mc9s08gt32a Freescale Semiconductor, Inc, mc9s08gt32a Datasheet - Page 176

no-image

mc9s08gt32a

Manufacturer Part Number
mc9s08gt32a
Description
Hcs08 Microcontrollers 8-bit Microcontroller Family
Manufacturer
Freescale Semiconductor, Inc
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
mc9s08gt32aCFBE
Manufacturer:
FREESCAL
Quantity:
192
Part Number:
mc9s08gt32aCFBE
Manufacturer:
FREESCALE
Quantity:
4 400
Part Number:
mc9s08gt32aCFBE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
mc9s08gt32aCFBE
Manufacturer:
FREESCALE
Quantity:
4 400
Part Number:
mc9s08gt32aCFBE
Manufacturer:
FREESCALE
Quantity:
20 000
Part Number:
mc9s08gt32aCFBE
0
Part Number:
mc9s08gt32aCFBER
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Serial Communications Interface (S08SCIV1)
11.2.3
This register can be read or written at any time.
176
Reset
Field
TCIE
ILIE
TIE
RIE
RE
TE
7
6
5
4
3
2
W
R
SCI Control Register 2 (SCIxC2)
TIE
Transmit Interrupt Enable (for TDRE)
0 Hardware interrupts from TDRE disabled (use polling).
1 Hardware interrupt requested when TDRE flag is 1.
Transmission Complete Interrupt Enable (for TC)
0 Hardware interrupts from TC disabled (use polling).
1 Hardware interrupt requested when TC flag is 1.
Receiver Interrupt Enable (for RDRF)
0 Hardware interrupts from RDRF disabled (use polling).
1 Hardware interrupt requested when RDRF flag is 1.
Idle Line Interrupt Enable (for IDLE)
0 Hardware interrupts from IDLE disabled (use polling).
1 Hardware interrupt requested when IDLE flag is 1.
Transmitter Enable
0 Transmitter off.
1 Transmitter on.
TE must be 1 in order to use the SCI transmitter. When TE = 1, the SCI forces the TxD pin to act as an output
for the SCI system.
When the SCI is configured for single-wire operation (LOOPS = RSRC = 1), TXDIR controls the direction of
traffic on the single SCI communication line (TxD pin).
TE also can be used to queue an idle character by writing TE = 0 then TE = 1 while a transmission is in progress.
Refer to
When TE is written to 0, the transmitter keeps control of the port TxD pin until any data, queued idle, or queued
break character finishes transmitting before allowing the pin to revert to a general-purpose I/O pin.
Receiver Enable — When the SCI receiver is off, the RxD pin reverts to being a general-purpose port I/O pin. If
LOOPS = 1 , the RxD pin reverts to being a general-purpose I/O pin even if RE = 1.
0 Receiver off.
1 Receiver on.
0
7
Section 11.3.2.1, “Send Break and Queued
TCIE
0
6
Table 11-4. SCIxC2 Register Field Descriptions
Figure 11-7. SCI Control Register 2 (SCIxC2)
MC9S08GB60A Data Sheet, Rev. 1.02
RIE
0
5
ILIE
0
4
Description
Idle,” for more details.
TE
3
0
RE
0
2
Freescale Semiconductor
RWU
0
1
SBK
0
0

Related parts for mc9s08gt32a