lf4415 LOGIC Devices Inc., lf4415 Datasheet - Page 22

• Manufacturer Part Number: lf4415
• Description: Video Memory / Fifo
• Manufacturer: LOGIC Devices Inc.

Register 16, 17, 18
Programmable
Full Flag 1
Definition
Register 3F
Working
Register
Update
LOGIC Devices Incorporated
Register 16 [7:2] Reserved [LOAD AS ‘000000’ IF MODIFYING REG 16]
Register 16,17,18 = FULL_THRESH_1[17:0] - PF1 Programmable threshold for the Partially Full
Flag behavior
FullThresh1is a 18 bit constant used to define the fullness threshold for the PF0 flag. The default is
79/80th of the total memory space of channel 1. In single channel and cascade modes, this threshold is
ignored. In dual channel mode this threshold applies only to channel 1’s PF flag.
Register 16= FULL_THRESH_1[17:16] (DEFAULT= 00)
5:0=FULL_THRESH_1[17:16]
Register 17 = FULL_THRESH_1[15:8] (DEFAULT= 00000000)
7:0=FULL_THRESH_1[15:8]
Register 18 = FULL_THRESH_1[7:0] (DEFAULT= 00000000)
7:0=FULL_THRESH_1[7:0]
Register 3F [7:0] = REG_UPDATE - Modified Register Update/Activation - LOAD as ‘00000000’
NOTE
Writing all ZEROS to Register 3F is REQUIRED to update the device’s operation.
Configuration Register Definitions
www.logicdevices.com
: After modifying any of the configuration registers, register 3F must be written with all zeros.
Most significant 2 bits of the 18bit FullThresh1
Middle byte of the 18bit FullThresh1
Least significant byte of the 18bit FullThresh1
22
PRELIMINARY
High Performance Memory Product
Video Memory / FIFO
MEMORY
FRAME
January 23, 2008 LDS-44xx-A
LF4460
LF4430
LF4415