km4132g271a ETC-unknow, km4132g271a Datasheet - Page 32

• Manufacturer Part Number: km4132g271a
• Description: 128k 32bit Banks Synchronous Graphic
• Manufacturer: ETC-unknow

CLOCK
KM4132G271A
Block Write cycle(with Auto Precharge)
ADDR
DQM
CKE
RAS
CAS
DSF
WE
DQ
CS
A
A
*Note 4
9
8
Row Active with
*Note :
Write-per-Bit
0
(A-Bank)
Enable
RAa
Ra
1
1. Column Mask(DQi=L : Mask, DQi=H :Non Mask)
2.
3. At two Cycle Block Write, second cycle should be in NOP.
4. At Block Write, CA
Other Bank can be active or precharge.
t
BWC
2
: Block Write Cycle time
t
t
BWC
BWC ¡Â
Block Write
3
(A-Bank)
Masked
*Note 1
Pixel
Mask
CAa
>
t
t
4
CC
CC
0~2
*Note 3
t
BWC
:Two CLK Cycle Block Write
Block Write with
:One CLK Cycle Block Write
Auto Precharge
are ignored.
5
(A-Bank)
Masked
*Note 2
CAb
Pixel
Mask
6
7
Row Active
8
(B-Bank)
RBa
RBa
9
HIGH
10
Block Write
11
(B-Bank)
Pixel
Mask
CBa
12
Block Write with
Auto Precharge
13
(B-Bank)
CBb
Pixel
Mask
14
Rev.0 (August 1997)
15
CMOS SGRAM
16
17
: Don't care
18
19