lf3312 LOGIC Devices Incorporated, lf3312 Datasheet - Page 23

• Manufacturer Part Number: lf3312
• Description: 12-mbit Frame Buffer / Fifo
• Manufacturer: LOGIC Devices Incorporated

DEVICES INCORPORATED
LOGIC Devices Incorporated
Configuration Register Definitions
Register B[7:4] = BFLAG_CTL[3:0] for pins BPE and BPF * (See below for legend)
BFLAG_CTL
*Each flag is updated on the rising edge of its associated clock: BWCLK (W) or RCLK (R)
AIN f, v, h are the TRS bits embedded in the incoming A channel TRS signals.
AOUT f, v, h are the TRS bits embedded in the emerging A channel TRS signals.
BIN f, v, h and BOUT f, v, h are the analogous B channel values.
RA(RB) is the read address pointer value for channel A(B).
MA(MB) is the ‘marked’ address pointer value for channel A(B).
Register B[3:0] AFLAG_CTL[3:0] for pins APE and APF *
*Each flag is updated on the rising edge of its associated clock: AWCLK (W) or RCLK (R)
AFLAG_CTL
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
BPE
B empty (R)
RB=MB (R)
BIN f (W)
BOUT f (R)
BIN f (W)
BOUT f (R)
BIN f (W)
BOUT f (R)
BIN v (W)
BOUT v (R)
APE
A empty (R)
RB=MB (R)
AIN f (W)
AOUT f (R)
AIN f (W)
AOUT f (R)
AIN f (W)
AOUT f (R)
AIN v (W)
AOUT v (R)
23
APF
A full (W)
RA=MA (R)
AIN v (W)
AOUT v (R)
AIN v (W)
AOUT v (R)
AIN h (W)
AOUT h (R)
AIN h (W)
AOUT h (R)
BPF
B full (W)
RA=MA (R)
BIN v (W)
BOUT v (R)
BIN v (W)
BOUT v (R)
BIN h (W)
BOUT h (R)
BIN h (W)
BOUT h (R)
12-Mbit Frame Buffer / FIFO
BCOLLIDE
BCOLLIDE (R)
BCOLLIDE (R)
BIN h (W)
BOUT h (R)
BCOLLIDE (R)
BCOLLIDE (R)
BCOLLIDE (R)
BCOLLIDE (R)
BCOLLIDE (R)
BCOLLIDE (R)
ACOLLIDE
ACOLLIDE (R)
ACOLLIDE (R)
AIN h (W)
AOUT h (R)
ACOLLIDE (R)
ACOLLIDE (R)
ACOLLIDE (R)
ACOLLIDE (R)
ACOLLIDE (R)
ACOLLIDE (R)
Preliminary Datasheet
Video Imaging Product
August 8, 2006 LDS.3312 O
LF3312