xr16c2852ij Exar Corporation, xr16c2852ij Datasheet - Page 34

• Manufacturer Part Number: xr16c2852ij
• Description: 2.97v To 5.5v Dual Uart With 128-byte Fifos
• Manufacturer: Exar Corporation

XR16C2852
2.97V TO 5.5V DUAL UART WITH 128-BYTE FIFOS
EMSR[5:4]: Extended RTS Hysteresis
EMSR[7:6]: Reserved
The FIFO Level Register replaces the Scratchpad Register (during a Read) when FCTR[6] = 1. Note that this
is not identical to the FIFO Data Count Register which can be accessed when LCR = 0xBF.
FLVL[7:0]: FIFO Level Register
This register provides the FIFO counter level for the RX FIFO or the TX FIFO or both depending on EMSR[1:0].
See Table 12
The concatenation of the contents of DLM and DLL gives the 16-bit divisor value which is used to calculate the
baud rate:
•
See MCR bit-7 and the baud rate table also.
4.13
4.14
Baud Rate = (Clock Frequency / 16) / Divisor
FIFO Level Register (FLVL) - Read-Only
Baud Rate Generator Registers (DLL and DLM) - Read/Write
for details.
EMSR
B
IT
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
-5
T
ABLE
EMSR
B
13: E
IT
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
-4
XTENDED
FCTR
B
IT
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
34
-1
RTS H
FCTR
B
IT
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
-0
YSTERESIS
(C
H
HARACTERS
YSTERESIS
RTS#
±16
±24
±32
±40
±44
±48
±52
±12
±20
±28
±36
±4
±6
±8
±8
0
)
xr
REV. 2.1.1