xr20v2172 Exar Corporation, xr20v2172 Datasheet - Page 20
xr20v2172
Manufacturer Part Number
xr20v2172
Description
Two Channel I2c/spi Uart With 64-byte Fifo And Rs232 Transceiver
Manufacturer
Exar Corporation
Datasheet
1.XR20V2172.pdf
(53 pages)
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XR20V2172
TWO CHANNEL I2C/SPI UART WITH 64-BYTE FIFO AND RS232 TRANSCEIVER
The V2172 UART provides an internal loopback capability for system diagnostic purposes. The internal
loopback mode is enabled by setting MCR register bit-4 to logic 1. All regular UART functions operate normally.
Figure 14
output is internally routed to the receive shift register input allowing the system to receive the same data that it
was sending. The TX, RTS# and DTR# pins are held while the CTS#, DSR# CD# and RI# inputs are ignored.
Caution: the RX input pin must be held HIGH during loopback test else upon exiting the loopback test the
UART may detect and report a false “break” signal. Also, auto RTS/CTS flow control is not supported during
internal loopback.
2.17
Internal Loopback
shows how the modem port signals are re-configured. Transmit data from the transmit shift register
F
IGURE
14. I
NTERNAL
L
OOP
Transmit Shift Register
B
Receive Shift Register
ACK
(RHR/FIFO)
(THR/FIFO)
RTS#
CTS#
DTR#
DSR#
CD#
RI#
20
MCR bit-4=1
VCC
OP2#
VCC
OP1#
VCC
TX
RX
RTS#
CTS#
DTR#
DSR#
RI#
CD#
REV. 1.0.0
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