xr20v2172 Exar Corporation, xr20v2172 Datasheet - Page 4

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xr20v2172

Manufacturer Part Number
xr20v2172
Description
Two Channel I2c/spi Uart With 64-byte Fifo And Rs232 Transceiver
Manufacturer
Exar Corporation
Datasheet
XR20V2172
TWO CHANNEL I2C/SPI UART WITH 64-BYTE FIFO AND RS232 TRANSCEIVER
Pin Description
Ancillary signals (CMOS/TTL Voltage Levels)
RXB_SEL
VREF+
XTAL1
XTAL2
VREF-
DSRA
DSRB
DTRA
DTRB
R_EN
N
FAST
CDA
CDB
GND
VCC
ACP
C2+
C1+
RIA
RIB
C2-
C1-
C3
AME
-
1, 16, 21, 35
64-QFN
45, 54
P
PAD
41
12
40
14
60
62
58
13
15
17
24
19
20
44
43
51
50
56
25
53
IN
6
#
T
Pwr
Pwr
Pwr
Pwr
Pwr
YPE
O
O
I
I
I
I
I
I
I
I
-
-
-
UART Data-Set-Ready. This input has an internal pull-down resistor and
can be left unconnected when not used. See MSR[5].
UART Data-Terminal-Ready. See MCR[0].
UART Carrier-Detect. This input has an internal pull-down resistor and
can be left unconnected when not used. See MSR[7].
UART Ring-Indicator. This input has an internal pull-down resistor and
can be left unconnected when not used. See MSR[6].
Crystal or external clock input.
Crystal or buffered clock output.
Autosleep for Charge Pump (active HIGH). When this pin is HIGH, the
charge pump is shut off if the V2172 is already in partial sleep mode, i.e.
the crystal oscillator is stopped.
When FAST is HIGH, the maximum serial data rate is 1 Mbps.
When FAST is LOW, the maximum serial data rate is 250 Kbps.
When the supply voltage is < 3.6V, connect R_EN to VCC.
When the supply voltage is > 3.6V, connect R_EN to GND.
When RXB_SEL is HIGH, RXB is the receive data input.
When RXB_SEL is LOW, RXDB is the receive data input.
Charge pump capacitors. As shown in
should be placed between these 2 pins.
Charge pump capacitors. As shown in
should be placed between these 2 pins.
When the supply voltage is 3.3 V, C3 should be connected to VCC.
When the supply voltage is 5 V, C3 should be connected to a 1 uF capac-
itor to GND.
-5.0V generated by the charge pump.
+5.0V generated by the charge pump.
Power supply common, ground.
3.3 to 5.5V power supply.
The center pad on the backside of the QFN packages is metallic and is
not electrically connected to anything inside the device. It must be sol-
dered on to the PCB and may be optionally connected to GND on the
PCB. The thermal pad size on the PCB should be the approximate size of
this center pad and should be solder mask defined. The solder mask
opening should be at least 0.0025" inwards from the edge of the PCB
thermal pad.
4
D
ESCRIPTION
Figure
Figure
1, a 0.1 uF capacitor
1, a 0.1 uF capacitor
REV. 1.0.0

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