xr20v2172 Exar Corporation, xr20v2172 Datasheet - Page 8

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xr20v2172

Manufacturer Part Number
xr20v2172
Description
Two Channel I2c/spi Uart With 64-byte Fifo And Rs232 Transceiver
Manufacturer
Exar Corporation
Datasheet
XR20V2172
TWO CHANNEL I2C/SPI UART WITH 64-BYTE FIFO AND RS232 TRANSCEIVER
There could be many devices on the I
are eight possible slave addresses that can be selected for the V2172 using the A1 and A0 address lines.
Table 1
select each I
An I
UART register address being accessed. A read or write transaction is determined by bit-0 of the slave
address. If bit-0 is’0’, then it is a write transaction. If bit-0 is ’1’, then it is a read transaction.
lists the functions of the bits in the I
After the last read or write transaction, the I
2.2
2
C sub-address is sent by the I
I
below shows the different addresses that can be selected. Note that there are two different ways to
2
C-bus Addressing
2
C address.
B
6:3
2:1
7
0
IT
VCC
VCC
VCC
VCC
GND
GND
GND
GND
SDA
SDA
SDA
SDA
SCL
SCL
SCL
SCL
A1
Reserved
UART Internal Register Address A3:A0
UART Channel Select
’00’ = UART Channel A
’01’ = UART Channel B
Reserved
T
2
ABLE
C sub-address.
2
2
GND
GND
GND
GND
VCC
VCC
VCC
VCC
SDA
SDA
SDA
SDA
C master following the slave address. The sub-address contains the
SCL
SCL
SCL
SCL
A0
C-bus. To distinguish itself from the other devices on the I
T
1: XR20V2172 I C A
ABLE
2
C-bus master will set the SCL signal back to its idle state (HIGH).
2: I C S
2
8
F
UB
0x6A (0110 101X)
0x6A (0110 101X)
UNCTION
0x60 (0110 000X)
0x62 (0110 001X)
0x64 (0110 010X)
0x68 (0110 100X)
0x6C (0110 110X)
0x60 (0110 000X)
0x62 (0110 001X)
0x64 (0110 010X)
0x68 (0110 100X)
0x6C (0110 110X)
0x66 (0110 011X)
0x6E (0110 111X)
0x66 (0110 011X)
0x6E (0110 111X)
2
-A
I
2
C A
DDRESS
DDRESS
DDRESS
M
AP
Table 2
2
C-bus, there
REV. 1.0.0
below

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