wm8961 Wolfson Microelectronics plc, wm8961 Datasheet - Page 18
wm8961
Manufacturer Part Number
wm8961
Description
Ultra-low Power Stereo Codec With 1w Stereo Class D Speaker Drivers And Ground Referenced Headphone Drivers
Manufacturer
Wolfson Microelectronics plc
Datasheet
1.WM8961.pdf
(116 pages)
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WM8961
Figure 7 Typical Power up Sequence when DVDD is Applied before AVDD
Figure 7 shows a typical power-up sequence where DVDD comes up first. First it is assumed that
DVDD is already up to specified operating voltage. When AVDD goes above the minimum threshold,
V
reset. In this condition, all writes to the control interface are ignored. When AVDD rises to V
PORB is released high and all registers are in their default state and writes to the control interface
may take place.
On power down, where DVDD falls first, PORB is asserted low whenever DVDD drops below the
minimum threshold V
Table 1 Typical POR Operation
Notes:
1.
2.
3.
pora
SYMBOL
V
V
V
V
, there is enough voltage for the circuit to guarantee PORB is asserted low and the chip is held in
V
pora_on
pora_off
pord_on
pord_off
If AVDD and DVDD suffer a brown-out (i.e. drops below the minimum recommended operating
level but do not go below V
operation when the voltage is back to the recommended level again.
The chip will enter reset at power down when AVDD or DVDD falls below V
may be important if the supply is turned on and off frequently by a power management system.
The minimum t
specification is guaranteed by design rather than test.
pora
MIN
pord_off
por
period is maintained even if DVDD and AVDD have zero rise time. This
0.65
TYP
0.5
1.1
1.1
0.9
.
MAX
pora_off
or V
UNIT
pord_off
V
V
V
V
V
) then the chip will not reset and will resume normal
PP, August 2009, Rev 3.1
pora_off
Pre-Production
or V
pord_off
pora_on
. This
18
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