wm8961 Wolfson Microelectronics plc, wm8961 Datasheet - Page 68

• Manufacturer Part Number: wm8961
• Description: Ultra-low Power Stereo Codec With 1w Stereo Class D Speaker Drivers And Ground Referenced Headphone Drivers
• Manufacturer: Wolfson Microelectronics plc

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WM8961
Table 50 Write Sequencer Default Values (RAM =Locations 0-31, ROM = Locations 32-48)
_LOCATION
WSEQ
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
WM8961
8’h45
8’h45
8’h02
8’h03
8’h03
8’h28
8’h29
8’h29
8’h3C
8’h3D
8’h1A
8’h31
8’h45
8’h48
8’h19
8’h1C
8’h19
8’h08
8’hFE
_INDEX
REG
1’b0
1’b0
1’b0
1’b0
1’b0
1’b0
1’b0
1’b0
1’b0
1’b0
1’b0
1’b0
1’b0
1’b0
1’b0
1’b0
1’b0
1’b0
1’b1
EOS
3’h4
3’h4
3’h6
3’h6
3’h0
3’h6
3’h6
3’h0
3’h4
3’h4
3’h5
3’h1
3’h5
3’h0
3’h5
3’h1
3’h1
3’h0
3’h0
WIDTH
START
4’h3
4’h2
4’h0
4’h0
4’h8
4’h0
4’h0
4’h8
4’h3
4’h3
4’h3
4’h6
4’h0
4’h0
4’h1
4’h3
4’h7
4’h4
4’h0
8’h0E
8’h0C
8’h00
8’h00
8’h01
8’h00
8’h00
8’h01
8’h00
8’h00
8’h00
8’h00
8’h00
8’h00
8’h00
8’h00
8’h00
8’h00
8’h00
DATA
DELAY
4’h0
4’h0
4’h0
4’h0
4’h0
4’h0
4’h0
4’h0
4’h0
4’h0
4’h0
4’h0
4’h0
4’h0
4’h0
4’h0
4’h0
4’h0
4’h0
Clear RMV_SHRT on
outputs
Clear
HPL_ENA_OUTP &
HPR_ENA_OUTP
LOUTVOL to mute
ROUTVOL to mute
OUT1VU
SPKLVOL to mute
SPKRVOL to mute
SPKVU
Disable Servo on
inputs
Disable Servo on
outputs
SPKL_PGA = 0,
SPKR_PGA = 0,
LOUT1_PGA = 0,
ROUT1_PGA = 0,
DACL = 0, DACR = 0
Disable Class D
Disable HPL_ENA,
HPR_ENA,
HPL_ENA_DLY,
HPR_ENA_DLY
Disable Charge Pump
VREF = 0 ; ADCL = 0 ;
ADCR = 0 ; MICB = 0 ;
AINL = 0 ; AINR = 0
BUFDCOPEN = 0,
BUFIOEN = 0 ;
Disable current bias
circuits
VMIDSEL = 00,
disable VMID
CLK_DSP_ENA = 0
Dummy Write for
expansion
COMMENT
CUMULATIVE
PP, August 2009, Rev 3.1
DELAY
0.0005
0.0005
0.0005
0.0005
0.0005
0.0005
0.0005
0.0005
0.0005
0.0005
0.0005
0.0005
0.0005
0.0005
0.0005
0.0005
0.0005
0.0005
0.0005
Pre-Production
STARTUP
0.0180
0.0185
0.0190
0.0195
0.0200
0.0205
0.0210
0.0215
0.0220
0.0225
0.0230
0.0235
0.0240
0.0245
0.0250
0.0255
0.0260
0.0265
0.0270
TIME
68