wm8961 Wolfson Microelectronics plc, wm8961 Datasheet - Page 84

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wm8961

Manufacturer Part Number
wm8961
Description
Ultra-low Power Stereo Codec With 1w Stereo Class D Speaker Drivers And Ground Referenced Headphone Drivers
Manufacturer
Wolfson Microelectronics plc
Datasheet
w
WM8961
Register 02h LOUT1 volume
Register 03h ROUT1 volume
Register 04h Clocking1
REGISTER
REGISTER
REGISTER
ADDRESS
ADDRESS
ADDRESS
Clocking1
R3 (03h)
R4 (04h)
R2 (02h)
ROUT1
volume
volume
LOUT1
BIT
6:0
BIT
6:0
BIT
8:6
5:3
8
7
8
7
2
ROUT1VOL[6:0]
LOUT1VOL[6:0]
ADCDIV[2:0]
DACDIV[2:0]
MCLKDIV
OUT1VU
OUT1VU
RO1ZC
LO1ZC
LABEL
LABEL
LABEL
DEFAULT
000_0000
000_0000
DEFAULT
DEFAULT
000
100
0
0
0
0
0
Defines the ADC 256fs clock, which is further divided by 2.
000 : 256fs = SYSCLK / 1.0 (default =12.288MHz, fs= 48 KHz)
001 : Reserved
010 : 256fs = SYSCLK / 2
011 : 256fs = SYSCLK / 3
100 : 256fs = SYSCLK / 4
101 : 256fs = SYSCLK / 5.5
110 : 256fs = SYSCLK / 6
111 : Reserved
Defines the DAC clock.
000 : DAC clock = SYSCLK / 1
001 : Reserved
010 : DAC clock = SYSCLK / 2
011 : DAC clock = SYSCLK / 3
100 : DAC clock = SYSCLK / 4 (default =3.072 MHz when
SYSCLK=12.288MHz)
101 : DAC clock = SYSCLK / 5.5
110 : DAC clock = SYSCLK / 6
111 : Reserved
Pre-divide MCLK to get SYSCLK.
0 : Divide by 1
1 : Divide by 2
Write 1 to do volume update on outputs
Left HP output zero cross enable
Left HP output PGA gain, 1dB steps
0000000 to 0101111 : Mute
0110000 : -73dB
1111001 : 0dB
1111111 : +6dB
Write 1 to do volume update on outputs
Right HP output zero cross enable
Right HP output PGA gain, 1dB steps
0000000 to 0101111 : Mute
0110000 : -73dB
1111001 : 0dB
1111111 : +6dB
DESCRIPTION
DESCRIPTION
DESCRIPTION
PP, August 2009, Rev 3.1
Pre-Production
84

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