wm8961 Wolfson Microelectronics plc, wm8961 Datasheet - Page 90

• Manufacturer Part Number: wm8961
• Description: Ultra-low Power Stereo Codec With 1w Stereo Class D Speaker Drivers And Ground Referenced Headphone Drivers
• Manufacturer: Wolfson Microelectronics plc

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WM8961
Register 13h ALC3
Register 14h Noise Gate
Register 15h Left ADC Volume
Noise Gate
REGISTER
REGISTER
REGISTER
ADDRESS
ADDRESS
ADDRESS
R19 (13h)
R20 (14h)
R21 (15h)
Left ADC
volume
ALC3
BIT
7:4
3:0
BIT
7:3
BIT
7:0
8
1
0
8
LADCVOL[7:0]
ALCMODE
NGTH[4:0]
DCY[3:0]
ATK[3:0]
ADCVU
LABEL
LABEL
LABEL
NGAT
NGG
1100_0000
DEFAULT
DEFAULT
DEFAULT
0_0000
0011
0010
0
0
0
0
Noise Gate Threshold
00000 : -76.5dB FS
00001 : -75dB FS
1.5dB steps…
1111-30dB FS
Noise gate mode
0 : Hold PGA gain static (recommended)
1 : Mute ADC output
Noise Gate Enable
Determines the ALC mode of operation:
0 = ALC mode
1 = Limiter mode
ALCSEL[1:0] bits must be set to 00 before changing this bit.
ALC Decay (gain ramp-up) time
0000 : 24ms
0001 : 48ms
Doubling each step…
1010-1111 : 24.58s
ALC Attack (gain ramp-down) time
0000 : 6ms
0001 : 12ms
0010 : 24ms
… (time doubles with every step)
1010 to 1111 : 6.14s
ADC digital volume update
Writing 1 to this bit will cause left and right ADC volumes to be updated
(LADCVOL and RADCVOL)
ADC Left Channel Digital Volume.
FFh -> Efh: +17.625dB
EEh: +17.25dB
…… in steps of -0.375dB to
C0h : 0dB
BFh : -0.375dB
Beh: -0.75dB
….. in steps of -0.375dB to
02h: -71.25dB
01h: -71.625dB
00h: Digital Mute
DESCRIPTION
DESCRIPTION
DESCRIPTION
PP, August 2009, Rev 3.1
Pre-Production
90