wm8961 Wolfson Microelectronics plc, wm8961 Datasheet - Page 32

• Manufacturer Part Number: wm8961
• Description: Ultra-low Power Stereo Codec With 1w Stereo Class D Speaker Drivers And Ground Referenced Headphone Drivers
• Manufacturer: Wolfson Microelectronics plc

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WM8961
R17 (11h)
ALC Control
(1)
R18 (12h)
ALC Control
(2)
R19 (13h)
ALC Control
(3)
REGISTER
ADDRESS
8:7
6:4
3:0
6:4
3:0
8
7:4
BIT
ALCSEL
[1:0]
MAXGAIN
[2:0]
ALCL
[3:0]
MINGAIN
[2:0]
HLD
[3:0]
ALCMODE
DCY
[3:0]
LABEL
DEFAULT
00
(OFF)
111
(+24dB)
1011
(-12dB)
000
0000
(0ms)
0
0011
(192ms)
ALC Function Select
00 = ALC off (PGA gain set by
01 = Right channel only
10 = Left channel only
11 = Stereo (PGA registers unused)
Set Maximum Gain of PGA
111 : +24dB
110 : +18dB
….(-6dB steps)
001 : -12dB
000 : -18dB
ALC Target (Sets signal level at ADC
input)
0000 = -28.5dB FS
0001 = -27.0dB FS
… (1.5dB steps)
1110 = -7.5dB FS
1111 = -6dB FS
Set Minimum Gain of PGA
000 = -23.25dB
001 = -17.25dB
010 = -11.25dB
011 = -5.25dB
100 = +0.75dB
101 = +6.75dB
110 = +12.75dB
111 = +18.75dB
ALC hold time before gain is
increased.
0000 = 0ms
0001 = 2.67ms
0010 = 5.33ms
… (time doubles with every step)
1111 = 43.691s
Determines the ALC mode of
operation:
0 = ALC mode
1 = Limiter mode
ALCSEL[1:0] bits must be set to 00
before changing this bit.
ALC decay (gain ramp-up) time
0000 = 24ms
0001 = 48ms
0010 = 96ms
… (time doubles with every step)
1010 or higher = 24.58s
register)
Note: ensure that LINVOL and
RINVOL settings (reg. 0 and 1)
are the same before entering
this mode.
PP, August 2009, Rev 3.1
DESCRIPTION
Pre-Production
32