a3p1000-1pqg208m Actel Corporation, a3p1000-1pqg208m Datasheet - Page 123

• Manufacturer Part Number: a3p1000-1pqg208m
• Description: Fpga Proasic 3 Family 1m Gates 130nm Cmos Technology 1.5v 208-pin Pqfp
• Manufacturer: Actel Corporation

Table 2-174 • Register Delays
Parameter
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
Note:
CLKQ
SUD
HD
SUE
HE
CLR2Q
PRE2Q
REMCLR
RECCLR
REMPRE
RECPRE
WCLR
WPRE
CKMPWH
CKMPWL
For specific junction temperature and voltage supply levels, refer to
Military-Case Conditions: T
Timing Characteristics
Clock-to-Q of the Core Register
Data Setup Time for the Core Register
Data Hold Time for the Core Register
Enable Setup Time for the Core Register
Enable Hold Time for the Core Register
Asynchronous Clear-to-Q of the Core Register
Asynchronous Preset-to-Q of the Core Register
Asynchronous Clear Removal Time for the Core Register
Asynchronous Clear Recovery Time for the Core Register
Asynchronous Preset Removal Time for the Core Register
Asynchronous Preset Recovery Time for the Core Register
Asynchronous Clear Minimum Pulse Width for the Core Register
Asynchronous Preset Minimum Pulse Width for the Core Register
Clock Minimum Pulse Width HIGH for the Core Register
Clock Minimum Pulse Width LOW for the Core Register
J
= 125°C, Worst-Case VCC = 1.14 V for A3PE600L and A3PE3000L
Description
R e v i s i o n 0
Table 2-5 on page 2-8
Military ProASIC3/EL Low Power Flash FPGAs
0.76
0.59
0.00
0.63
0.00
0.55
0.55
0.00
0.31
0.00
0.31
0.30
0.30
0.56
0.56
for derating values.
–1
0.90
0.70
0.00
0.74
0.00
0.65
0.65
0.00
0.36
0.00
0.36
0.34
0.34
0.64
0.64
Std.
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
2- 109