a3p1000-1pqg208m Actel Corporation, a3p1000-1pqg208m Datasheet - Page 18

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a3p1000-1pqg208m

Manufacturer Part Number
a3p1000-1pqg208m
Description
Fpga Proasic 3 Family 1m Gates 130nm Cmos Technology 1.5v 208-pin Pqfp
Manufacturer
Actel Corporation
Datasheet
Military ProASIC3/EL DC and Switching Characteristics
2 - 4
I/O Power-Up and Supply Voltage Thresholds for Power-On Reset
(Military)
Sophisticated power-up management circuitry is designed into every ProASIC
ensure easy transition from the powered-off state to the powered-up state of the device. The many
different supplies can power up in any sequence with minimized current spikes or surges. In addition, the
I/O will be in a known state through the power-up sequence. The basic principle is shown in
on page 2-5
There are five regions to consider during power-up.
Military ProASIC3 I/Os are activated only if ALL of the following three conditions are met:
VCCI Trip Point:
Ramping up: 0.6 V < trip_point_up < 1.2 V
Ramping down: 0.5 V < trip_point_down < 1.1 V
VCC Trip Point:
Ramping up: 0.6 V < trip_point_up < 1.1 V
Ramping down: 0.5 V < trip_point_down < 1 V
VCC and VCCI ramp-up trip points are about 100 mV higher than ramp-down trip points. This specifically
built-in hysteresis prevents undesirable power-up oscillations and current surges. Note the following:
1. VCC and VCCI are above the minimum specified trip points
2. VCCI > VCC – 0.75 V (typical)
3. Chip is in the operating mode.
Figure 2-3 on page
During programming, I/Os become tristated and weakly pulled up to VCCI.
JTAG supply, PLL power supplies, and charge pump VPUMP supply have no influence on I/O
behavior.
and
Figure 2-3 on page
2-6).
2-6.
R e vi s i o n 0
(Figure 2-2 on page 2-5
®
3 device. These circuits
Figure 2-2
and

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