a3p1000-1pqg208m Actel Corporation, a3p1000-1pqg208m Datasheet - Page 52

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a3p1000-1pqg208m

Manufacturer Part Number
a3p1000-1pqg208m
Description
Fpga Proasic 3 Family 1m Gates 130nm Cmos Technology 1.5v 208-pin Pqfp
Manufacturer
Actel Corporation
Datasheet
Military ProASIC3/EL DC and Switching Characteristics
Table 2-40 • I/O Short Currents I
Table 2-41 • Schmitt Trigger Input Hysteresis, Hysteresis Voltage Value (typical) for Schmitt Mode Input
2- 38
3.3 V LVTTL / 3.3V LVCMOS
2.5 V LVCMOS
1.8 V LVCMOS
1.5V LVCMOS
3.3 V PCI/PCI-X
*
Input Buffer Configuration
3.3 V LVTTL/LVCMOS/PCI/PCI-X (Schmitt trigger mode)
2.5 V LVCMOS (Schmitt trigger mode)
1.8 V LVCMOS (Schmitt trigger mode)
1.5 V LVCMOS (Schmitt trigger mode)
1.2 V LVCMOS (Schmitt trigger mode)
T
J
= 100°C
Applicable to Standard Plus I/O Banks for A3P1000 Only
Buffers Applicable to A3PE600L and A3PE3000L Only
The length of time an I/O can withstand I
reliability data below is based on a 3.3 V, 12 mA I/O setting, which is the worst case for this type of
analysis.
OSH
/I
OSL
Per PCI/PCI-X specification
Drive Strength
OSH
R e visio n 0
12mA
16mA
12mA
2mA
4mA
6mA
8mA
2mA
4mA
6mA
8mA
2mA
4mA
6mA
8mA
2mA
4mA
/I
OSL
events depends on the junction temperature. The
I
OSL
Hysteresis Value (typical)
103
103
103
25
25
51
51
16
16
32
32
65
17
35
35
13
25
9
(mA)*
240 mV
140 mV
40 mV
80 mV
60 mV
I
OSH
109
109
109
27
27
54
54
18
18
37
37
74
22
44
44
16
33
11
(mA)*

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