s71pl512nd0 Meet Spansion Inc., s71pl512nd0 Datasheet - Page 62
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s71pl512nd0
Manufacturer Part Number
s71pl512nd0
Description
Two S29pl256n Devices 32 M X 16-bit Cmos 3.0-volt Only Simultaneous Read/write, Page-mode Flash Memory
Manufacturer
Meet Spansion Inc.
Datasheet
1.S71PL512ND0.pdf
(90 pages)
- Current page: 62 of 90
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13.8
60
AC Characteristics
13.8.1 Read Operations
13.8.2 Read Operation Timing Diagrams
Notes:
1.
2.
3.
4.
5.
JEDEC
t
t
t
t
t
t
t
EHQZ
GHQZ
AVAV
AVQV
ELQV
GLQV
AXQX
Parameter
Not 100% tested.
See
Measurements performed by placing a 50 ohm termination on the data pin with a bias of V
high to the data bus driven to V
For 70pf Output Load Capacitance, 2 ns is added to the above t
CE1# and CE2# for the PL129N.
Addresses
RESET#
RY/BY#
Figure 13.3
t
t
t
Std.
PACC
t
t
t
t
t
t
ACC
OEH
OH
RC
CE
OE
DF
DF
CE#
WE#
Data
OE#
Read Cycle Time (1)
Address to Output Delay
Chip Enable to Output Delay (5)
Page Access Time
Output Enable to Output Delay
Chip Enable to Output High Z (3)
Output Enable to Output High Z (1, 3)
Output Hold Time From Addresses, CE# or OE#,
Whichever Occurs First (3)
Output Enable Hold Time (1)
0 V
and
Table 13.1
S29PL-N MirrorBit™ Flash Family
CC
for test specifications
Figure 13.6 Read Operation Timings
t
RH
/2 is taken as t
Description
(Notes)
HIGH Z
t
RH
t
P r e l i m i n a r y
OEH
Read
Toggle and Data# Polling
DF
.
t
ACC
t
Addresses Stable
CE
t
RC
ACC
t
OE
,t
CE
,t
CE#, OE# = V
OE# = V
PACC
Test Setup
Valid Data
,t
OE
IL
t
values for all speed grades
OH
IL
S29PL-N_M0_A4 November 23, 2005
CC
Max
Max
Max
Max
Max
Max
Min
Min
Min
Min
/2. The time from OE#
t
Speed Options
DF
65
65
65
25
25
65
70
70
70
30
30
16
16
10
70
5
0
HIGH Z
80
80
80
30
30
80
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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