s71pl512nd0 Meet Spansion Inc., s71pl512nd0 Datasheet - Page 9

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s71pl512nd0

Manufacturer Part Number
s71pl512nd0
Description
Two S29pl256n Devices 32 M X 16-bit Cmos 3.0-volt Only Simultaneous Read/write, Page-mode Flash Memory
Manufacturer
Meet Spansion Inc.
Datasheet
2
December 6, 2005 S71PL512ND0_00_A2
Input/Output Descriptions and Logic Symbol
Table 2.1
A23– A0
DQ15 – DQ0
F1-CE#
F2-CE#
R-CE1#
R-CE2
OE#
WE#
RY/BY#
UB#
LB#
RESET#
WP#/ACC
F-V
R-V
V
NC
SS
Symbol
CC
CC
f
identifies the input and output package connections provided on the device.
Input
I/O
Input
Input
Input
Input
Input
Input
Output
Input
Input
Input
Input
Supply
Supply
Supply
Not connected
Type
P r e l i m i n a r y
S71PL512ND0 MirrorBit™ Flash Family
Address Inputs (common)
16-bit data inputs/outputs (common)
Chip Enable (Flash 1)
Chip Enable (Flash 2)
Chip Enable 1 (pSRAM)
Chip Enable 2 (pSRAM)
Output Enable input
Write Enable
Ready/Busy Output (Flash 1)
Upper Byte Control (pSRAM)
Lower Byte Control (pSRAM)
Hardware reset pin, Active Low (Flash 1)
Hardware Write Protect/Acceleration pin (Flash)
Flash 3.0 volt-only single power supply (see Product Selctor Guide for speed options and
voltage supply tolerances)
pSRAM Power Supply
Device ground (common)
Pin Not Connected Internally
24
Table 2.1 Input/Output Descriptions
F1-CE#
F2-CE#
R-CE1#
R-CE2
OE#
WE#
WP #/ACC
RES ET#
UB#
LB#
A23–A0
DQ15–DQ0
R Y/BY#
Description
16
7

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