s71pl512nd0 Meet Spansion Inc., s71pl512nd0 Datasheet - Page 86

• Manufacturer Part Number: s71pl512nd0
• Description: Two S29pl256n Devices 32 M X 16-bit Cmos 3.0-volt Only Simultaneous Read/write, Page-mode Flash Memory
• Manufacturer: Meet Spansion Inc.

84
Note: WE#=V
Note: 16Mb: A2 ~ A19, 32Mb: A2 ~ A20, 64Mb: A2 ~ A21, 128Mb: A2 ~ A22.
t
voltage levels.
At any given temperature and voltage condition, t
device interconnection.
t
If invalid address signals shorter than min. t
(t
DQ15~DQ0
HZ
OE
Address
RC
Data out
Address
(max) is met only when OE# becomes enabled after t
UB #, LB#
and t
) or needs to sustain standby state for min. t
CS 1#
CS 2
OE#
A1~A0
OHZ
CS 1#
CS 2
OE#
are defined as the time at which the outputs achieve the open circuit conditions and are not referenced to output
1)
IH
.
Figure 27.3. Timing Waveform of Page Cycle (Page Mode Only)
High-Z
Figure 27.2. Timing Waveform of Read Cycle(2)
High Z
pSRAM Type 2
RC
t
Address
AA
Address
t
CO
Valid
Valid
are continuously repeated for over 4µs, the device needs a normal read timing
P r e l i m i n a r y
t
LZ
t
RC
BLZ
t
HZ
OLZ
at least once in every 4µs.
(Max.) is less than t
t
t
AA
CO
t
AA
t
BA
OE
(max).
t
OE
t
RC
LZ
Data
Valid
(Min.) both for a given device and from device to
Address
t
PA
Valid
t
PC
Data Valid
Data
Valid
Address
Valid
Dat a
Valid
pSRAM_15_A2 February 3, 2005
Address
Valid
t
OH
t
OHZ
t
BHZ
t
Dat a
Valid
HZ
t
OHZ