s71pl512nd0 Meet Spansion Inc., s71pl512nd0 Datasheet - Page 76
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s71pl512nd0
Manufacturer Part Number
s71pl512nd0
Description
Two S29pl256n Devices 32 M X 16-bit Cmos 3.0-volt Only Simultaneous Read/write, Page-mode Flash Memory
Manufacturer
Meet Spansion Inc.
Datasheet
1.S71PL512ND0.pdf
(90 pages)
- Current page: 76 of 90
- Download datasheet (2Mb)
74
For further information, please see the CFI Specification (see JEDEC publications JEP137-A and
JESD68.01and CFI Publication 100). Please contact your sales office for copies of these
documents.
Addresses
Addresses
Addresses
1Dh
2Dh
10h
11h
12h
13h
14h
15h
16h
17h
18h
19h
1Ah
1Bh
1Ch
1Eh
20h
21h
22h
23h
24h
25h
26h
27h
28h
29h
2Ah
2Bh
2Ch
2Eh
30h
31h
32h
33h
34h
35h
36h
37h
38h
1Fh
2Fh
007Dh (PL256N)
003Dh (PL127N)
003Dh (PL129N)
0019h (PL256N)
0018h (PL127N)
0018h (PL129N)
0051h
0052h
0059h
0002h
0000h
0040h
0000h
0000h
0000h
0000h
0000h
0027h
0036h
0000h
0000h
0006h
0009h
000Bh
0000h
0003h
0003h
0002h
0000h
0001h
0000h
0006h
0000h
0003h
0003h
0000h
0000h
0001h
0000h
0000h
0004h
0003h
0000h
0000h
0001h
Data
Data
Data
S29PL-N MirrorBit™ Flash Family
Table 15.3 CFI Query Identification String
Table 15.5 Device Geometry Definition
Table 15.4 System Interface String
Query Unique ASCII string QRY
Primary OEM Command Set
Address for Primary Extended Table
Alternate OEM Command Set (00h = none exists)
Address for Alternate OEM Extended Table (00h = none exists)
V
D7 – D4: volt, D3 – D0: 100 millivolt
V
D7 – D4: volt, D3 – D0: 100 millivolt
V
V
Typical timeout per single byte/word write 2
Typical timeout for Min. size buffer write 2
Typical timeout per individual block erase 2
Typical timeout for full chip erase 2
Max. timeout for byte/word write 2
Max. timeout for buffer write 2
Max. timeout per individual block erase 2
Max. timeout for full chip erase 2
Device Size = 2
Flash Device Interface description (see CFI publication 100)
Max. number of byte in multi-byte write = 2
(00h = not supported)
Number of Erase Block Regions within device
Erase Block Region 1 Information
(see the CFI specification or CFI publication 100)
Erase Block Region 2 Information
(see the CFI specification or CFI publication 100)
Erase Block Region 3 Information
(see the CFI specification or CFI publication 100)
CC
CC
PP
PP
P r e l i m i n a r y
Min. voltage (00h = no V
Max. voltage (00h = no V
Min. (write/erase)
Max. (write/erase)
N
byte
PP
PP
N
pin present)
pin present)
times typical
N
Description
Description
Description
times typical (00h = not supported)
N
N
times typical
ms (00h = not supported)
N
N
times typical
N
µs (00h = not supported)
N
N
ms
µs
S29PL-N_M0_A4 November 23, 2005
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