am42bds640ag Meet Spansion Inc., am42bds640ag Datasheet - Page 17

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am42bds640ag

Manufacturer Part Number
am42bds640ag
Description
64 Megabit 4 M ? 16-bit Cmos 1.8 Volt-only, Simultaneous Operation, Burst Mode Flash Memory And 16 Mbit 1 M ? 16-bit Static Ram Preliminary
Manufacturer
Meet Spansion Inc.
Datasheet
The following hardware data protection measures
prevent accidental erasure or programming, which
might otherwise be caused by spurious system level
signals during V
tions, or from system noise.
Write Protect (WP#)
The Write Protect (WP#) input provides a hardware
method of protecting data without using V
If the system asserts V
disables program and erase functions in sectors 0 and
1 (bottom boot) or sectors 132 and 133 (top boot).
If the system asserts V
reverts to whether the two outermost 8K Byte boot
sectors were last set to be protected or unprotected.
Note that the WP# pin must not be left floating or
unconnected; inconsistent behavior of the device may
result.
COMMON FLASH MEMORY INTERFACE
(CFI)
The Common Flash Interface (CFI) specification out-
lines device and host system software interrogation
handshake, which allows specific vendor-specified
software algorithms to be used for entire families of
devices. Software support can then be device-indepen-
dent, JEDEC ID-independent, and forward- and back-
ward-compatible for the specified flash device families.
Flash vendors can standardize their existing interfaces
for long-term compatibility.
This device enters the CFI Query mode when the
system writes the CFI Query command, 98h, to
address 55h any time the device is ready to read array
data. The system can read CFI information at the
16
When WP# is at V
or sectors 132 and 133 (top boot) are locked.
When ACC is at V
Addresses
10h
11h
12h
13h
14h
15h
16h
17h
18h
CC
power-up and power-down transi-
IL
IL
, all sectors are locked.
, sectors 0 and 1 (bottom boot)
IL
IH
0051h
0052h
0059h
0002h
0000h
0040h
0000h
0000h
0000h
on the WP# pin, the device
on the WP# pin, the device
Data
Table 3. CFI Query Identification String
Query Unique ASCII string “QRY”
Primary OEM Command Set
Address for Primary Extended Table
Alternate OEM Command Set (00h = none exists)
ID
P R E L I M I N A R Y
.
Am42BDS640AG
Low V
When V
any write cycles. This protects data during V
power-up and power-down. The command register and
all internal program/erase circuits are disabled, and the
device resets to reading array data. Subsequent writes
are ignored until V
must provide the proper signals to the control inputs to
prevent unintentional writes when V
V
Write Pulse “Glitch” Protection
Noise pulses of less than 5 ns (typical) on OE#, CE# or
WE# do not initiate a write cycle.
Logical Inhibit
Write cycles are inhibited by holding any one of OE# =
V
CE# and WE# must be a logical zero while OE# is a
logical one.
Power-Up Write Inhibit
If WE# = CE# = RESET# = V
power up, the device does not accept commands on
the rising edge of WE#. The internal state machine is
automatically reset to the read mode on power-up.
addresses given in Tables 3-6. To terminate reading
CFI data, the system must write the reset command.
The system can also write the CFI query command
when the device is in the autoselect mode. The device
enters the CFI query mode, and the system can read
CFI data at the addresses given in Tables 3-6. The
system must write the reset command to return the
device to the autoselect mode.
For further information, please refer to the CFI Specifi-
cation and CFI Publication 100, available via the AMD
site at the following URL:
http://www.amd.com/us-en/FlashMemory/Technical-
Resources/0,,37_1693_1780_1834^1955,00.html.
Alternatively, contact an AMD representative for copies
of these documents.
LKO
IL
, CE# = V
.
CC
CC
Write Inhibit
is less than V
Description
IH
or WE# = V
CC
is greater than V
LKO
, the device does not accept
IH
. To initiate a write cycle,
IL
and OE# = V
November 1, 2002
CC
LKO
is greater than
. The system
IH
during
CC

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