th50vsf3583aasb TOSHIBA Semiconductor CORPORATION, th50vsf3583aasb Datasheet - Page 24

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th50vsf3583aasb

Manufacturer Part Number
th50vsf3583aasb
Description
Sram And Flash Memory Mixed Multi-chip Package
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
Auto Block / Multiple Block Erase Mode
latched on the falling edge of the WE signal in the sixth bus cycle. The Block Erase starts as soon as the erase
hold time (t
bus write cycles and input the block addresses and the Auto Block Erase command within the erase hold time
(Auto Multiple Block Erase). If a command sequence other than Auto Block Erase or Erase Suspend command is
input during the erase hold time, the device resets the Command register and enters Read mode. The erase hold
time is valid every WE rising edge. Once operation starts, all the memory cells in the block selected in the
device are automatically preprogrammed to data 0, erased, and Erase is verified. The device status can be
determined from the setting of the Hardware Sequence flag. To read the Hardware Sequence flag, the addresses
of blocks on which Auto Erase is being performed must be specified. When the selected blocks exit in all the
banks, simultaneous operation cannot be performed.
can be aborted by a hardware reset. The Auto Erase operation does not complete correctly when aborted,
therefore, a further Erase operation is necessary.
operation is not executed and the device returns to Read mode 100 µs after the rising edge of the WE signal in
the last bus cycle.
device status is determined from the Hardware Sequence flag. Either a Reset command or a Hardware reset is
necessary to return the device to Read mode after a failure. If multiple blocks are selected, the block in which a
failure occurred cannot be detected. Either terminate device usage, or perform Block Erase for each block,
specify the failed block, and stop using it. The host processor must take measures to prevent use of the failed
block being used in the future.
Erase Suspend / Resume Mode
The Erase Suspend command is allowed during an auto block erase operation but is ignored in all other
oreration modes. The Erase Suspend command is inhibited to input during the Erase Hold Time. When the
command is input, the address of the bank on which Erase is being performed must be specified.
command is input during an Auto Block Erase, the device will enter Erase Suspend Read Mode after t
device status (Erase Suspend Read Mode) can be verified by checking the Hardware Sequence flag. If data is
read consecutively from the block selected for Auto Block Erase, the DQ2 output will toggle and the DQ6 output
will stop toggling and
not been selected for the Auto Block Erase. Data is written in the usual manner.
the bank on which the Write was being performed must be specified. On receiving an Erase Resume command,
the device returns to the state it was in when the Erase Suspend command was input. If an Erase Suspend
command is input during the Erase Hold Time, the device will return to the state it was in at the start of the
Erase Hold Time. At this time more blocks can be specified for erasing. If an Erase Resume command is input
during an Auto Block Erase, Erase resumes. At this time toggle output of DQ6 resumes and 0 is output on
RY
The Auto Block and Multiple Block Erase modes are set using the Block Erase command. The block address is
Commands (except Erase Suspend) are ignored during a Block/Multiple Block Erase operation. The operation
An attempt to erase a protected block is ignored. If all the selected blocks are protected, the Auto Erase
If an Auto Erase operation fails, the device remains in erasing state and does not return to Read mode. The
Erase Suspend Mode suspends Auto Block Erase and reads data from or writes data to an unselected block.
In Erase Suspend Mode only a Read, Program or Resume command can be accepted. If an Erase Suspend
Inputting a Write command during an Erase Suspend enables a Write to be performed to a block which has
To resume the Auto Block Erase, input an Erase Resume command. On input of the command, the address of
/
BY
.
BEH
) has elapsed after the rising edge of the WE signal. To erase multiple blocks, repeat the 6
RY
/
BY
will be set to High-Impedance.
TH50VSF3582/3583AASB
2001-06-08 24/50
SUSE
. The
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