am49pdl129bh85it Meet Spansion Inc., am49pdl129bh85it Datasheet - Page 71
![no-image](/images/no-image-200.jpg)
am49pdl129bh85it
Manufacturer Part Number
am49pdl129bh85it
Description
Stacked Multi-chip Package Mcp Flash Memory And Psram, 128 Megabit 8m ? 16-bit Cmos 3.0 Volt-only, Simultaneous Operation Flash Memory And 32 Mbit 2m ? 16-bit Cmos Pseudo Static Ram With Page Mode
Manufacturer
Meet Spansion Inc.
Datasheet
1.AM49PDL129BH85IT.pdf
(86 pages)
- Current page: 71 of 86
- Download datasheet (2Mb)
FLASH AC CHARACTERISTICS
Note: VA = Valid address. Illustration shows first status cycle after command sequence, last status read cycle, and array data
read cycle.
December 16, 2003
CE#f2 (PDL129 only)
CE#f2 (PDL129 only)
Addresses
CE#f1 or
WE#
Data
OE#
Addresses
DQ6–DQ0
CE#f1 or
RY/BY#
WE#
DQ7
OE#
WE# Controlled Write Cycle
Figure 21. Data# Polling Timings (During Embedded Algorithms)
t
WPH
t
t
Figure 20. Back-to-back Read/Write Cycle Timings
BUSY
CH
Valid PA
A D V A N C E
t
t
OEH
t
WC
t
WP
AH
t
DS
Valid
In
Am49PDL127BH/Am49PDL129BH
t
ACC
t
t
CE
DH
t
VA
t
RC
OE
t
OEH
Complement
Status Data
Valid RA
t
SR/W
t
t
ACC
t
RC
CE
t
OH
I N F O R M A T I O N
t
t
OE
DF
Read Cycle
Valid
Out
t
OH
t
VA
DF
t
Complement
GHWL
Status Data
t
WC
Valid PA
True
True
Valid
CE#f Controlled Write Cycles
In
t
CPH
VA
Valid PA
Valid Data
Valid Data
t
WC
Valid
In
t
CP
High Z
High Z
69
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