am49pdl129bh85it Meet Spansion Inc., am49pdl129bh85it Datasheet - Page 79

• Manufacturer Part Number: am49pdl129bh85it
• Description: Stacked Multi-chip Package Mcp Flash Memory And Psram, 128 Megabit 8m ? 16-bit Cmos 3.0 Volt-only, Simultaneous Operation Flash Memory And 32 Mbit 2m ? 16-bit Cmos Pseudo Static Ram With Page Mode
• Manufacturer: Meet Spansion Inc.

pSRAM AC CHARACTERISTICS
Write Cycle
Notes:
1. If the device is using the I/Os to output data, input signals of reverse polarity must not be applied.
2. If OE# is high during the write cycle, the outputs will remain at high impedance.
3. If CE#1ps, LB# or UB# goes low at the same time or after WE# goes low, the outputs will remain at high impedance.
4. If CE#1ps, LB# or UB# goes high at the same time or before WE# goes high, the outputs will remain at high impedance.
December 16, 2003
DQ15 to DQ0
DQ15 to DQ0
Parameter
Addresses
Symbol
A20 to A0
LB#, UB#
t
t
t
t
t
t
t
t
t
t
ODW
OEW
WEH
t
t
t
t
CEH
WC
WP
CW
BW
AW
WR
AS
DS
DH
CH
CE#1
D
WE#
CE2
OUT
D
IN
Description
Write Cycle Time
Write Pulse Time
Chip Enable to End of Write
Data Byte Control to End of Write
Address Valid to End of Write
Address Setup Time
Write Recovery Time
WE# Low to Write to Output High-Z
WE# High to Write to Output Active
Data Set-up Time
Data Hold from Write Time
CE2 Hold Time
Chip Enable High Pulse Width
Write Enable High Pulse Width
(Note 1)
(Note 3)
t
CH
Figure 29. Pseudo SRAM Write Cycle—WE# Control
t
AS
A D V A N C E
Am49PDL127BH/Am49PDL129BH
t
ODW
I N F O R M A T I O N
t
CW
t
BW
t
WC
t
WP
Max
Min
Min
Min
Min
Min
Min
Min
Min
Min
Min
Min
Min
Min
High-Z
Valid Data In
t
DS
66
70
50
60
60
60
t
OEW
t
DH
t
Speed
WR
300
20
30
10
0
0
0
0
6
85
85
60
70
70
70
(Note 4)
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
µs
ns
ns
77