lrs1302 Sharp Microelectronics of the Americas, lrs1302 Datasheet - Page 16

• Manufacturer Part Number: lrs1302
• Description: 8m Flash And 1m Sram
• Manufacturer: Sharp Microelectronics of the Americas

1.5 Read Identifier
The read
nanufacturer
:onfiguration
ock configuration
nanufacturer
u,rtomatically
algorithms.
:onfiguration
~1ock.s and master lock-bit setting.
OFFFF
IFFFF
oooo4
oooo3
moo2
FOO04
FOOO3
FOOOZ 1
FOOOO
looo4
1ooo3
Figure 3. Device Identifier
ooml
FOOOl
SHARP
I
------------------------------------.
~~~~~~~~----__-__---________________(
--------_-__________----------------.
identifier
The
Block 15 Lock Configuration
and device codes, the system CPU can
codes for each block,
Master Lock Configuration
Block 0 Lock Configuration
codes identify
Block 1 Lock Configuration
match
code,
Future Implementation
Future Implementation
Future Implementation
Codes Operation
Future Implementation
block
(Blocks 2 through 14) ’
code (see Figure
Manufacturer
codes
the
Device Code
Reserved for
device
Reserved for
Reserved for
Reserved for
lock
device
operation
Code Memory
locked
code,
Code
and
with
and the master
and unlocked
3). Using
Code
Code
master
Code
Code
Block 1
outputs
block
Block
its proper
Map
LRS13023
lock
lock
the
the
commands.
The CUI
location.
address and data needed to execute a command-are
latched on the rising edge of WE or CE (whichever
goes
m-controlled
4 COMMAND
When the VP, voftage I VPPLK, Read operations
the status
enabled. Placing VP,,
erase, byte write and lock-bit configuration
Device
commands
3.6 Write
Writing
device
inspection
V,--=Vccl
controls
configuration.
The
command
erased.
command
Set Master and Block Lock-Bit
command
Lock) or block within
locked. The Clear Block Lock-Bits
the command
timings
Block
high
data and identifier
are used. jQures:13
operations
The
It is written
commands
block
does not occupy
data and an address within
and address of the location
and clearing
and address
register,
and
into
first&
Erase
and address within the device.
write operahons.
Byte
D&INITlON~
erasure,
VPP=VPPH,
the CUI.
are selected by writing
Stand,ard microprocessor
command
Write
when WE and a
identifier
to the CUI
on.Vpp enables successful block
the device (Block Lock) to be
of the status register.
within
byte
codes. They also control
and 14 illustrate
command
an addressable
Table
the CUI
commands
codes, or blocks
requires
write,
the device
enable
co mmand
4 defines
:
the block to be
are active. The
to be written.
requires
and
additionally
appropriate
operations.
require the
reading
WE and
memory
requires
specific
(Master
lock-bit
When
write
these
from
are
the
14
of