mt18vddt12872ag-335 Micron Semiconductor Products, mt18vddt12872ag-335 Datasheet - Page 15

• Manufacturer Part Number: mt18vddt12872ag-335
• Description: 256mb, 512mb, 1gb, 2gb X72, Ecc, Dr 184-pin Ddr Sdram Udimm
• Manufacturer: Micron Semiconductor Products

Table 14: I
DDR SDRAM components only
Notes: 1–5, 8, 10, 12, 48; notes appear on pages 19–22; 0°C
pdf: 09005aef80814e61, source: 09005aef807f8acb
DD18C32_64_128_256x72AG.fm - Rev. B 9/04 EN
PARAMETER/CONDITION
NOTE:
OPERATING CURRENT: One device bank; Active-Precharge;
t
changing once per clock cyle; Address and control inputs
changing once every two clock cycles
OPERATING CURRENT: One device bank; Active -Read
Precharge; Burst = 4;
I
clock cycle
PRECHARGE POWER-DOWN STANDBY CURRENT: All device
banks idle; Power-down mode;
(LOW)
IDLE STANDBY CURRENT: CS# = HIGH; All device banks idle;
t
inputs changing once per clock cycle. V
DQS, and DM
ACTIVE POWER-DOWN STANDBY CURRENT: One device
bank active; Power-down mode;
ACTIVE STANDBY CURRENT: CS# = HIGH; CKE = HIGH; One
device bank; Active-Precharge;
t
clock cycle; Address and other control inputs changing once
per clock cycle
OPERATING CURRENT: Burst = 2; Reads; Continuous burst;
One bank active; Address and control inputs changing once
per clock cycle;
I
OPERATING CURRENT: Burst = 2; Writes; Continuous burst;
One device bank active; Address and control inputs
changing once per clock cycle;
DQS inputs changing twice per clock cycle
AUTO REFRESH CURRENT
SELF REFRESH CURRENT: CKE
OPERATING CURRENT: Four device bank interleaving READs
(BL = 4) with auto precharge,
(MIN); Address and control inputs change only during
Active READ, or WRITE commands
OUT
OUT
RC =
CK =
CK =
a: Value calculated as one module rank in this operating condition, and all other module ranks in I
b: Value calculated reflects all module ranks in this operating condition.
= 0mA; Address and control inputs changing once per
= 0mA
t
t
t
RC (MIN);
CK (MIN); DQ, DM andDQS inputs changing twice per
CK MIN; CKE = HIGH; Address and other control
t
DD
CK =
t
CK =
Specifications and Conditions – 1GB
t
t
RC =
CK (MIN);
t
CK (MIN); DQ, DM and DQS inputs
t
RC (MIN);
t
t
RC =
CK =
t
0.2V
t
t
RC =
CK =
CK =
t
t
RC (MIN);
CK (MIN); DQ, DM, and
t
t
t
CK (MIN); CKE = LOW
t
RAS (MAX);
CK (MIN); CKE =
CK =
IN
= V
t
t
Standard
Low Power
REFC =
REFC = 7.8125µs
t
CK (MIN);
REF
t
CK =
for DQ,
t
RFC (MIN)
256MB, 512MB, 1GB, 2GB (x72, ECC, DR)
t
CK
15
T
A
I
I
I
I
I
I
I
I
SYM
DD4W
I
I
DD3N
I
DD5A
I
DD6A
I
DD2P
DD2F
DD3P
DD4R
DD5
DD6
DD0
DD1
DD7
+70°C; V
b
b
a
a
a
b
b
b
a
b
b
b
a
Micron Technology, Inc., reserves the right to change products or specifications without notice.
184-PIN DDR SDRAM UDIMM
1,215
1,485
1,530
1,620
5,220
3,690
DD
-335
810
630
900
180
90
90
54
= V
DD
Q = +2.5V ±0.2V
MAX
1,215
1,485
1,530
1,440
5,220
3,645
-262
810
630
900
180
90
90
54
-26A/
1,080
1,350
1,350
1,260
5,040
3,195
©2004 Micron Technology, Inc. All rights reserved.
-265
720
540
810
180
90
90
54
DD
2
P
UNITS
(CKE LOW) mode.
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
NOTES
21, 28,
21, 28,
20, 42
20, 42
24, 44
24, 44
20, 44
44
45
44
20
44
9
9