m395t5160dz4-cd56/e66 Samsung Semiconductor, Inc., m395t5160dz4-cd56/e66 Datasheet - Page 11
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m395t5160dz4-cd56/e66
Manufacturer Part Number
m395t5160dz4-cd56/e66
Description
Ddr2 Fully Buffered Dimm
Manufacturer
Samsung Semiconductor, Inc.
Datasheet
1.M395T5160DZ4-CD56E66.pdf
(31 pages)
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2.7 Advanced Memory Buffer Block Diagram
FBDIMM
Figure 11 : Advanced Memory Buffer Block Diagram
Ref Clock
Reset#
SMbus
1x2
Controller
Control
LAI
Reset
Controller
Thermal
SMbus
Sensor
PLL
NORTH
Core Control
and CSRs
CRC Check
Data CRC Gen
Command
Decoder &
& Read FIFO
Northbound
Data Out
Southbound
10x2
mux
failover
Data In
PISO
Data Merge
10*2
14*6*2
failover
demux
14x2
Write
deep
FIFO
Data
36
Advance Memory Buffer
IBIST -TX
Link Init SM
and Control
and CSRs
Sync & ldie
Generator
Re-Time
IBIST - RX
External MEMBIST
Pattern
Block Dlagram
DDR calibration &
DDR IOBIST/DFX
Re-synch
Link lnit SM
and Control
LAI Logic
and CSRs
Re-synch
DRAM Cmd
Re-Time
DDR State
Controller
and CSRs
IBIST - RX
11 of 31
14x2
NB LAI Buffer
demux
Data Merge
10*2
patterns
lnit
IBIST - TX
Northbound
Data In
14*12
Southbound
Data Out
PISO
mux
10x2
Cmd Out
Data Out
Data In
Rev. 1.01 March 2008
72 + 18x2
29
29
DDR2 SDRAM
4
4
DRAM Clock #
DRAM Clock
DRAM Address /
Command Copy 1
DRAM Address /
Command Copy 2
DRAM
Data / strobe
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