m395t5160dz4-cd56/e66 Samsung Semiconductor, Inc., m395t5160dz4-cd56/e66 Datasheet - Page 22
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m395t5160dz4-cd56/e66
Manufacturer Part Number
m395t5160dz4-cd56/e66
Description
Ddr2 Fully Buffered Dimm
Manufacturer
Samsung Semiconductor, Inc.
Datasheet
1.M395T5160DZ4-CD56E66.pdf
(31 pages)
Table 13 : Differential Transmitter Output Specifications
FBDIMM
Differential peak-to-peak output voltage for large
voltage swing
Differential peak-to -peak output voltage for requ-
lar voltage swing
Differential peak-to-peak output voltage for small
votage swing
DC common code output voltage for large voltage
swing
DC common code output voltage for small volt-
age swing
De-emphasized differential output voltage ratio
for -3.5 dB de-emphasis
De-emphasized differential output voltage ratio
for -6.0 dB de-emphasis
AC peak-to-peak common mode output voltage
for large swing
AC peak-to-peak common mode output voltage
for regular swing
AC peak-to-peak common mode output voltage
for small swing
Maximum single-ended voltage in EI condition
DC+AC
Maximum single-ended voltage in EI condition
DC+AC
Maximum peak-to-peak differential voltage in EI
condition
Single-ended voltage (w.r.t. VSS) on D+/D-
Mimimum TX eye width, 3.2 and 4.0 Gb/s
Mimimum TX eye width 4.8 Gb/s
Maximum TX deterministic jitter, 3.2 and 4.8Gb/s
Maximum TX deterministic jitter, 4.8 Gb/s
Insantaneous pulse width
Differential TX output rise/fall time
Mismatch between rise and fall times
Differential return loss
Common mode return loss
Transmitter termination impender
D+/D-TX Impedance difference
Lane-to lane skew at TX
Lane-to lane skew at TX
Parameter
T
T
V
V
V
V
V
V
TX-RISE
V
V
T
TX-RF-MISMATCH
R
V
V
TX-IDLE-DIFFp-p
T
TX-DIFFPp-p_R
TX-DE-3.5-Ratio
TX-DE-6.0-Ratio
TX-CM-ACp-p-L
TX-CM-ACp-p-R
TX-CM-ACp-p-S
TX-IDLE-SE-DC
TX-EYE-MIN4.8
V
T
RL
TX-MATCH-DC
L
L
TX-DIFFp-p_S
T
TX-DIFFp-p_L
TX-DJ-DD-4.8
T
V
V
TX-Eye-MIN
RL
Symbol
TX-IDLE-SE
TX-SKEW1
TX-SKEW2
TX-PULSE
V
TX-DJ-DD
TX-CM_S
TX-CM_L
TTX-DIFF
TX-SE
R
TX-CM
TX
T
TX-FALL
22 of 31
0.85
MIN
-3.0
-5.0
900
800
520
135
-75
30
41
8
6
Values
100+3UI
100=2UI
1,300
MAX
TBD
375
280
-4.0
-7.0
750
90
80
70
50
20
40
02
90
20
55
4
Units
mV
mV
mV
mV
mV
mV
mV
mV
mV
mV
mV
mV
dB
dB
dB
dB
UI
UI
UI
UI
UI
ps
ps
ps
ps
%
rately to high and low output voltage
EQ 4, Boundaries are applied sepa-
Rev. 1.01 March 2008
1 GHz-2.4 GHz, Note 11
1 GHz-2.4 GHz, Note 11
20-80% voltage, Note1
DDR2 SDRAM
EQ2, Note1,2
EQ7, Note1,5
EQ7, Note1,5
EQ7, Note1,5
Comments
EQ1, Note1
EQ1, Note1
EQ1, Note1
EQ2, Note1
13, 15
14, 15
states
1,8,9
1,8,9
1,3,4
1,2,3
1,7
1,8
1,8
10
12
6
6