mt9v032 aptina, mt9v032 Datasheet - Page 27

• Manufacturer Part Number: mt9v032
• Description: 1/3-inch Wide-vga Cmos Digital Image Sensor
• Manufacturer: aptina

Table 8:
PDF: 6538045704/Source:2194051501
MT9V022_DS - Rev. C 9/10 EN
Bit
0x0E (14) Monitor Mode
0x0F (15) Pixel Operation Mode
0x1B (27) LED_OUT Control
3:2
9:8
4
5
6
7
0
2
6
0
Column Bin
Row Flip
Column Flip
Show Dark Rows
Show Dark
Columns
Reserved
Monitor Mode
Enable
Color/Mono
High Dynamic
Range
Disable LED_OUT
Bit Name
Register Descriptions (continued)
0 = Normal operation.
1 = Column bin 2. When set, image size is reduced by a
factor of 2 horizontally. Frame rate is not affected but
data rate and pixel clock are reduced by one-half that of
master clock.
2 = Column bin 4. When set, image size is reduced by a
factor of 4 horizontally. Frame rate is not affected but
data rate and pixel clock are reduced by one-fourth that
of master clock.
3 = Not valid.
Read out rows from bottom to top (upside down). When
set, row readout starts from row (Row Start + Window
Height) and continues down to (Row Start + 1). When
clear, readout starts at Row Start and continues to (Row
Start + Window Height - 1). This ensures that the
starting color is maintained.
Read out columns from right to left (mirrored). When
set, column readout starts from column (Col Start +
Window Width) and continues down to (Col Start + 1).
When clear, readout starts at Col Start and continues to
(Col Start + Window Width - 1). This ensures that the
starting color is maintained.
When set, the programmed dark rows is output before
the active window. Frame valid is thus asserted earlier
than normal. This has no effect on integration time or
frame rate. Whether the dark rows are shown in the
image or not the definition frame start is before the
dark rows are read out.
When set, the programmed dark columns are output
before the active pixels in a line. Line valid is thus
asserted earlier than normal, and the horizontal blank
time gets shorter by 18 pixel clocks.
Reserved.
Setting this bit puts the sensor into a cycle of sleeping
for five minutes, and waking up to capture a
programmable number of frames (R0xC0). Clearing this
bit resumes normal operation.
Should be set according to sensor type:
0 = Monochrome.
1 = Color.
0 = Linear operation.
1 = High Dynamic Range. Voltage and shutter width
must be correctly set for saturation control to operate.
Disable LED_OUT output. When cleared, the output pin
LED_OUT is pulsed high when the sensor is undergoing
exposure.
Bit Description
28
MT9V032: 1/3-Inch Wide-VGA Digital Image Sensor
Default in
Hex (Dec)
0
0
0
0
0
3
0
0
0
0
Aptina reserves the right to change products or specifications without notice.
Shadowed
Y
Y
Y
Y
Y
Y
Y
Y
Y
©2005 Aptina Imaging Corporation. All rights reserved.
Values
0, 1, 2
Legal
(Dec)
0, 1
0, 1
0, 1
0, 1
0, 1
0, 1
0, 1
0, 1
Registers
Read/
Write
W
W
W
W
W
W
W
W
W