lc89058w Sanyo Semiconductor Corporation, lc89058w Datasheet - Page 21

• Manufacturer Part Number: lc89058w
• Description: Cmos Digital Audio Interface Receiver
• Manufacturer: Sanyo Semiconductor Corporation

10.1.5 Master clock block diagram (XIN, XOUT, RMCK, XMCK)
• The relationships between the two types of PLL and XIN source master clocks, switching, and the frequency division
• The contents in the quotation marks “*** “ by the switch and function blocks correspond to the write command names.
• Lock/Unlock is automatically switched by PLL locking/unlocking.
function are described below.
S/PDIF
XOUT
GPIO0
XIN
“AMPOPR[1:0]”
“PLLOPR”
512fs
PLL
“PLLDV1”
“PLLDV2”
(N=1,2,4)
(N=1,2,4)
“PRSEL[1:0]”
“XINSEL”
Auto 1/N
12.288M
24.567M
1/N
Figure 10.2 Master Clock Block Diagram
“XRSEL[1:0]”
(N=1,2,4)
LC89058W-E
“PLLACC”
1/N
“XMSEL[1:0]”
(N=1, 2)
1/N
Lock/Unlock
“EMCKP”
“OCKSEL”
“RMCKP”
“EXTSEL”
No.A1056-21/64
RMCK
XMCK