lc89058w Sanyo Semiconductor Corporation, lc89058w Datasheet - Page 42
lc89058w
Manufacturer Part Number
lc89058w
Description
Cmos Digital Audio Interface Receiver
Manufacturer
Sanyo Semiconductor Corporation
Datasheet
1.LC89058W.pdf
(64 pages)
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12.2.2 Details of write commands
• When reset by SYSRST is performed, RBCK outputs “L” and BLRCK outputs “H.”
MOSEL
AOSEL
SYSRST
DOEN
TESTM
RXMON
FSLIM[1:0]
TESTM
DI15
DI15
DI7
DI7
0
0
0
System reset
DO pin output setting
Test mode setting
Setting of sampling frequency reception range for input digital signal
AUDIO output mode
Setting digital audio data (S/PDIF) input status monitoring
MOUT output contents setting
DI14
DI14
DI6
DI6
0
0
0
0
0: Don't reset (initial value)
1: Reset circuits other than command registers
0: Output (initial value)
1: Always high impedance state (read disabled)
0: Normal operation (initial value)
1: Enter test mode
0: Output channel status emphasis information (initial value)
1: Output input data fs calculation results (output conditions are given by FSSEL[1:0].)
0: Only output channel status bit 1 (initial value)
1: Output channel status bit 1, IEC61937 or DTS-CD/LD detection flag
0: Don’t monitor S/PDIF input status (initial value).
1: Monitor S/PDIF input status
00: No limit (initial value)
01: fs≤96kHz (when exceeded, data is muted and clock is set to XIN system output)
10: fs≤48kHz (when exceeded, data is muted and clock is set to XIN system output)
11: Reserved
CCB address: 0xE8; Command address: 0; System setting 1
CCB address: 0xE8; Command address: 1; System setting 2
FSLIM1
DI13
DI13
DI5
DI5
0
0
0
FSLIM0
LC89058W-E
DI12
DI12
DI4
DI4
0
0
1
RXMON
DI11
DI11
DI3
DI3
0
0
0
AOSEL
DI10
DI10
DI2
DI2
0
0
0
DOEN
CAU
CAU
DI1
DI9
DI1
DI9
0
No.A1056-42/64
SYSRST
MOSEL
CAL
CAL
DI0
DI8
DI0
DI8