lc89058w Sanyo Semiconductor Corporation, lc89058w Datasheet - Page 46

• Manufacturer Part Number: lc89058w
• Description: Cmos Digital Audio Interface Receiver
• Manufacturer: Sanyo Semiconductor Corporation

• When the oscillation amplifier is set to the permanent continuous operation mode with AMPOPR [1:0] or fs changes
• The phase of R system clock and S system clock synchronize.
• To input data to SDIN, select a clock synchronized with the SDIN input data.
• The XIN source can be switched while maintaining the PLL locked status. However, since switching between clock
• If the oscillation amplifier is set to stop automatically when the PLL gets locked, XIN source switching from the PLL
are set not to be reflected to the error flag with FSERR, OCKSEL can switch the clock source while maintaining the
RERR status.
and data output can be set independently; it is recommended to select mute or SDIN data for the output data when
XIN source is switched.
locked status disables the clock output. Be sure to set the oscillation amplifier to the continuous operation mode when
switching the clock source to the XIN source.
OCKSEL
RDTSEL
RDTSTA
RDTMUT
DI15
DI7
0
0
CCB address: 0xE8; Command address: 5; Clock source switching; RDATA output setting
RDTMUT
Clock source setting
RDATA output setting while PLL is unlocked
RDATA output setting
RDATA mute setting
DI14
DI6
1
0: Use XIN clock as source while PLL is unlocked (initial value)
1: Use XIN clock as source regardless of PLL status
0: Output SDIN data while PLL is unlocked (initial value)
1: Mute while PLL is unlocked
0: According to RDTSEL (initial value)
1: Output SDIN input data regardless of PLL status
0: Output data selected with RDTSEL (initial value)
1: Muted
RDTSTA
DI13
DI5
0
RDTSEL
LC89058W-E
DI12
DI4
1
DI11
DI3
0
0
DI10
DI2
0
0
OCKSEL
CAU
DI1
DI9
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CAL
DI0
DI8
0