lc89058w Sanyo Semiconductor Corporation, lc89058w Datasheet - Page 50

• Manufacturer Part Number: lc89058w
• Description: Cmos Digital Audio Interface Receiver
• Manufacturer: Sanyo Semiconductor Corporation

• Non-PCM data is identical to the detection data output to
• Output data is muted if an error occurs due to non-PCM data with RESEL.
• The RESTA setting is not reflected to the output pins of data and clock.
• For FSERR, the fs calculation result obtained while the oscillation amplifier is stopped is not reflected. In this case, fs
• ERWT[1:0] defines the interval of time for RERR to output error cancellation ("L") after PLL is locked. Since
changes consist of only channel status fs information.
demodulated audio data is output after RERR cancels an error, you need to change this setting if the situation that the
head of data is missing is a problem.
RESEL
REDER
RESTA
FSERR
ERWT [1:0]
ERWT1
DI15
DI7
1
ERWT0
DI14
DI6
RERR output contents setting
Setting of parity error flag output within 8 times in a row
RERR output condition setting
Setting of error flag output condition according to fs change
Setting of RERR wait time after PLL is locked
0
0: PLL lock error or data error (initial value)
1: PLL lock error or data error or non-PCM data
0: Output only when non-PCM data is recognized (initial value)
1: Output only during sub-frame for which error was generated
0: Output PLL status all the time (Output PLL status even during XIN source)
1: Forcibly output error (Set "H" to RERR forcibly)
0: Reflect fs changes to error flag (initial value)
1: Don't reflect fs changes to error flag
00: Cancel error after preamble B is counted 3 (initial value)
01: Cancel error after preamble B is counted 24
10: Cancel error after preamble B is counted 12
11: Cancel error after preamble B is counted 6
(initial status)
CCB address: 0xE8, Command address: 9; RERR output setting
FSERR
DI13
DI5
0
RESTA
LC89058W-E
DI12
DI4
1
AUDIO.
_________
DI11
DI3
0
0
DI10
DI2
0
0
REDER
CAU
DI1
DI9
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RESEL
CAL
DI0
DI8