lc89058w Sanyo Semiconductor Corporation, lc89058w Datasheet - Page 45

• Manufacturer Part Number: lc89058w
• Description: Cmos Digital Audio Interface Receiver
• Manufacturer: Sanyo Semiconductor Corporation

• Setting of XSBCK [1:0] relate to setting of RMCK output clock. SBCK output clock is set to become 1/2 or less of
RMCK output clock at XIN source.
PSBCK [1:0]
PSLRCK [1:0]
XSBCK [1:0]
XSLRCK [1:0] SLRCK output frequency setting during XIN source
XSLRCK1
DI15
DI7
0
XSLRCK0
Setting of SBCK frequency while PLL is locked
Setting of SLRCK frequency while PLL is locked
Setting of SBCK frequency during XIN source
DI14
DI6
1
CCB address: 0xE8; Command address: 4; S system output clock setting
00: 3.072MHz output (RMCK≥6.144MHz) (initial value)
01: 6.144MHz output (RMCK≥12.288MHz)
10: 12.288MHz output (RMCK=24.576MHz)
11: Muted
00: 48kHz output (initial value)
01: 96kHz output
10: 192kHz output
11: Muted
00: 64fs output (initial value)
01: 128fs output
10: 32fs output
11: 16fs output
00: fs output (initial value)
01: 2fs output
10: fs/2 output
11: fs/4 output
XSBCK1
DI13
DI5
0
XSBCK0
LC89058W-E
DI12
DI4
0
PSLRCK1
DI11
DI3
0
PSLRCK0
DI10
DI2
0
PSBCK1
CAU
DI1
DI9
No.A1056-45/64
PSBCK0
CAL
DI0
DI8