w65c134s Western Design Center, Inc., w65c134s Datasheet - Page 8

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w65c134s

Manufacturer Part Number
w65c134s
Description
W65c134s 8-bit Microcontroller
Manufacturer
Western Design Center, Inc.
Datasheet
T imer A Edge Interrupt Flag
U
0 = Timer A Edge Interrupt has not occurred. This bit cannot be set when UART is in operation.
1 = Timer A edge Interrupt has occurred. This interrupt vector is located at the Asynchronous Transmitter vector location.
This bit is cleared to a "0" by writing a "1" to it. Writing a "0" to this bit has no affect.
7
T imer A Interrupt Enable
U
0 = Timer A Interrupt Disabled.
1 = Timer A Interrupt Enabled.
6
T imer A Output Enable
U
0 = Timer A output disabled
1 = Timer A TOUT enabled. When ACSR0=1, Timer A and TXD are used for the UART.
Figure 1-3 Timer Control Register One (TCR1x) ($000A)
5
T imer A Clock Select
U
0 = Timer A counts PHI2 clock pulses
1 = Timer A counts TIN negative pulses. When ACSR5=1, Timer A and RXD are
used for the UART and this bit should be cleared to "0".
4
T imer A Enable
U
0 = TA clock disabled (counter stopped)
1 = TA clock enabled. This bit should be set to a 1 for UART
operation
3
F CLK Start and Stop Control
U
0 = Stop FCLK
1 = Start FCLK
2
P HI2 System Timing Clock Select
U
0 = PHI2 clock source is CLK (Clock)
1 = PHI2 clock source is FCLK (Fast Clock)
1
M onitor Watch Dog Timer M
U
Load Enable
0 to 1 transition loads the Timer
M from the Timer M latches
0
TCR1x($000A)
8

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