RM7000-300S PMC [PMC-Sierra, Inc], RM7000-300S Datasheet - Page 25

• Manufacturer Part Number: RM7000-300S
• Manufacturer: PMC [PMC-Sierra, Inc]

Proprietary and Confidential to PMC-Sierra, Inc and for its Customer’s Internal Use
Document ID: PMC-2002175, Issue 1
Figure 7 Tertiary Cache Hit and Miss
Other capabilities of the tertiary interface include block write, tag invalidate, and tag probe. For
details of these transactions as well as detailed timing waveforms for all the tertiary transactions,
see the R5000 or RM7000 Bus Interface Specifications. The tertiary cache tag can easily be
implemented with standard components such as the Motorola MCM69T618.
The RM7000 cache attributes for the instruction, data, internal secondary, and optional external
tertiary caches are summarized in Table 6.
Master
SysClock
SysAD
TcLine[17:0]
TcWord[1:0]
TcTCE*
TcMatch
TcDCE*
TcCWE*
TcDOE*
Processor
Index
Addr
I0
I1
Data0
I2
RM7000™ Microprocessor with On-Chip Secondary Cache Datasheet
Tertiary(Hit)
Data1
I3
Data2
Data3
Processor
Addr
Index
I0
I1
Tertiary(Miss)
Data0
I2
Data1
I3
System
Data0
I0
Released
Data1
I1
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