RM7000-300S PMC [PMC-Sierra, Inc], RM7000-300S Datasheet - Page 36

• Manufacturer Part Number: RM7000-300S
• Manufacturer: PMC [PMC-Sierra, Inc]

Proprietary and Confidential to PMC-Sierra, Inc and for its Customer’s Internal Use
Document ID: PMC-2002175, Issue 1
Table 11 Cause Register
Table 12 Interrupt Control Register
Table 13 IPLLO Register
Table 14 IPLHI Register
These two registers contain a four-bit field corresponding to each interrupt thereby allowing each
interrupt to be programmed with a priority level from 0 to 13 inclusive. The priorities can be set in
any manner including having all the priorities set exactly the same. Priority 0 is the highest level
and priority 15 the lowest. The format of the priority level registers is shown in Table 13 and Table
14 above. The priority level registers are located in the coprocessor 0 control register space. For
further details about the control space see the section describing coprocessor 0.
In addition to programmable priority levels, the RM7000 also permits the spacing between
interrupt vectors to be programmed. For example, the minimum spacing between two adjacent
vectors is 0x20 while the maximum is 0x200. This programmability allows the user to either set up
the vectors as jumps to the actual interrupt routines or, if interrupt latency is paramount, to include
the entire interrupt routine at the vector. Table 15 illustrates the complete set of vector spacing
selections along with the coding as required in the Interrupt Control register bits 4:0.
In general, the active interrupt priority combined with the spacing setting generates a vector offset
which is then added to the interrupt base address of 0x200 to generate the interrupt exception
offset. This offset is then added to the exception base to produce the final interrupt vector address.
31
BD
31..16
0
31..28
IPL7
31..28
0
30
0
27..24
IPL6
27..24
0
15..8
IM[15..8] TE
29,28
CE
23..20
IPL5
23..20
IPL13
7
27
0
19..16
IPL4
19..16
IPL12
6..5
0
RM7000™ Microprocessor with On-Chip Secondary Cache Datasheet
26
W2
15..12
IPL3
15..12
IPL11
4..0
Spacing
25
W1
11..8
IPL2
11..8
IPL10
24
IV
7..4
IPL1
7..4
IPL9
23..8
IP[15..0]
3..0
IPL0
3..0
IPL8
7
0
6..2
EXC
Released
0,1
0
36