lxt9785 Intel Corporation, lxt9785 Datasheet - Page 13

• Manufacturer Part Number: lxt9785
• Description: Advanced 8-port 10/100 Mbps Phy Transceivers
• Manufacturer: Intel Corporation

Datasheet
Document Number: 249241
Revision Number: 007
Revision Date: August 28, 2003
Page
120
130
131
136
145
146
148
148
149
149
150
151
152
153
158
166
170
171
173
174
175
175
176
116
119
36
42
42
43
1
Description
Changed "pseudo-ECL (PECL)" to "Low Voltage Positive Emitter Coupled Logic (LVPECL)" in the
second paragraph, front page.
Modified
sentence to RXER0 through RXER7 signal description.
Modified
Modified
Modified
note to PREASEL signal description.
Modified
(LVPECL)" in the first paragraph, second sentence.
Replace text under
Modified
Modified last sentence under
Modified text under
Modified text under
Changed "PECL" to "LVPECL in third paragraph, first sentence under
Network
Modified
Modified
“synchronously.”
Modified text under
Modified paragraph under
Replaced text under
Modified
Modified first sentence under
Modified first paragraph of
Modified Item 1 of
Modified
Replaced text under
Replaced
Interface
Replaced
Circuitry”.
Modified
Modified
2.5 V +/-
Modified
3.3 V +/-
Added
Modified
Table 55 “Intel® LXT9785/LXT9785E Digital I/O DC Electrical Characteristics – SD
Operations”.
Table 5 “Intel® LXT9785/LXT9785E RMII Signal Descriptions –
Table 10 “Intel® LXT9785/LXT9785E Signal Detect –
Table 11 “Intel® LXT9785/LXT9785E Network Interface Signal Descriptions –
Table 13 “Intel® LXT9785/LXT9785E Miscellaneous Signal Descriptions –
Section 4.1,
Section 4.3.2, “Internal
Section 4.9.3.3, “Carrier Sense/Data Valid
Section 4.10.1, “Preamble
Section 4.12.3, “Out-of-Band
Table 52 “Intel® LXT9785/LXT9785E Operating
Table 53 “Intel® LXT9785/LXT9785E Digital I/O DC Electrical Characteristics (VCCIO =
Table 54 “Intel® LXT9785/LXT9785E Digital I/O DC Electrical Characteristics (VCCIO =
Table 58 “Intel® LXT9785/LXT9785E 100BASE-FX Transceiver
5%)”.
5%)”.
Figure 28 “Intel® LXT9785/LXT9785E Protocol
Circuitry”.
Figure 36 “Recommended Intel® LXT9785/LXT9785E-to-3.3 V Fiber Transceiver
Figure 37 “Recommended Intel® LXT9785/LXT9785E-to-5 V Fiber Transceiver Interface
Section 4.11.2, “Interaction between Processor, MAC, and
Section 4.2.1.3, “Fiber
Section 4.9.3.4, “Carrier Sense
Section 4.6.1.5, “Parallel
Section 4.7.4.3, “Receive
Revision Number: 006 (INTERNAL RELEASE)
Section 4.9.3.7, “Fiber PMD
Section 5.2.5, “The Fiber
“Introduction”. Changed "Pseudo-ECL (PECL)" to "Low Voltage PECL
Section 4.9.3.6.3, “Polarity
Section 4.11, “DTE Discovery
Revision Date: June 10, 2003
Section 4.6.1.4, “Link
Section 4.10.4,
Loopback”.
Handling”. Added text to last paragraph.
Signaling”. Added sentence to end of first paragraph.
Interface”.
Detection”. Added second paragraph.
“Jabber”.
Error”.
Interface”.
Sublayer”.
(SMII)”. Revised last sentence in first paragraph.
Criteria”.
(RMII)”. Changed “asynchronously to
Correction”.
Sublayers”.
Process”.
Conditions”.
PQFP”.
Section 4.9.1, “100BASE-X
PQFP”. Added last
Characteristics”.
PHY”.
PQFP”. Added
PQFP”,
Contents
Pins”.
13