lxt9785 Intel Corporation, lxt9785 Datasheet - Page 153

• Manufacturer Part Number: lxt9785
• Description: Advanced 8-port 10/100 Mbps Phy Transceivers
• Manufacturer: Intel Corporation

4.11.5
Datasheet
Document Number: 249241
Revision Number: 007
Revision Date: August 28, 2003
Table 47. Next Page Message #5 Code Word Definitions
associated with message code #5 (Organizationally Unique Identifier (OUI) Tag Code). The
definition for the next pages to be sent out for this message code include some user-defined code
values. These values are loaded with randomly created data from an internal LSFR that is free
running and seeded with the PHY address of the LXT9785E port. The Next Pages are hard coded
in the logic (the LXT9785E ignores any data written into Register 7) and are outlined in
The receiver monitors the next pages to determine that the exact next page data (especially the
random data) transmitted is received. As soon as the first non-matching next page is detected, the
DTE Discovery process is stopped and the base page is used to determine the capability options.
The Power-Enable Register bit 27.4 is set when a Remote-Power DTE is detected as the link
partner, and the last next page is repeatedly transmitted until software restarts the required
negotiation process (auto-negotiation or forced-speed mode).
The software should be written so that the negotiation is not restarted until the DTE has been
powered up over the Category 5 cable. The Power-Enable Register bit 27.4 is cleared upon
restarting or disabling auto-negotiation (selecting forced mode). The system must be able to detect
over-current conditions and be capable of disabling power in case the link partner is not a Remote-
Power DTE. Some examples of devices that would mistakenly set Power-Enable Register bit 27.4
are a token-ring balun and a loopback cable. Once link partner power has been stabilized and
sufficient time has passed for the link partner to initialize, the auto-negotiation process may be
restarted.
The negotiation process establishes link if a compatible mode exists between the LXT9785E and
the link partner. If a compatible mode does not exist (not compatible or not established within the
Link Fail Inhibit Timer period), the LXT9785E either restarts auto-negotiation/DTE discovery
(discovery is enabled (27.6=1) and auto-negotiation is enabled (0.12 = 1)), or normal negotiation
(discovery is disabled (27.6=0) and auto-negotiation is enabled (0.12 = 1)), or either 10 Mbps or
100 Mbps forced-mode operation (auto-negotiation is disabled (0.12 = 0)). The software must
detect this non-link state and disable power.
DTE Discovery Behavior
The device behavior checks the comparison bit after each next page is successfully auto-
negotiated. If the first next page or any subsequent next page does not match, the DTE Discovery
process transmits one last null page with the next page bit cleared to stop the DTE Discovery
Next Page
User Page
User Page
User Page
User Page
Encoding
Message
1. a is the acknowledge bit; t is the toggle bit; L is the LFSR
Tagged
OUI
1
2
3
4
D15 D14 D13 D12 D11 D10
LXT9785 and LXT9785E Advanced 8-Port 10/100 Mbps PHY Transceivers
1
1
1
1
1
a
a
a
a
a
1
0
0
0
0
0
0
0
0
0
t
t
t
t
t
3.10 3.11 3.12 3.13 3.14 3.15
L.10
2.5
0
0
D9
2.6
L.9
0
0
2.7
L.8
L.8
D8
0
2.8
L.7
L.7
D7
0
2.9
L.6
L.6
D6
0
2.10 2.11 2.12 2.13 2.14 2.15
L.5
L.5
D5
0
2.0
L.4
L.4
D4
0
2.1
L.3
L.3
D3
0
D2
2.2
L.2
L.2
1
Table
D1
2.3
L.1
L.1
0
155
47.
2.4
L.0
L.0
D0
1