gc41c501g1-so24i CORERIVER Semiconductor, gc41c501g1-so24i Datasheet - Page 12

• Manufacturer Part Number: gc41c501g1-so24i
• Description: 4-bit Microcontrollers With Reduced 8051 Architecture
• Manufacturer: CORERIVER Semiconductor

6.2. Indirect Function Flag (IFF) Description
WDTR
SLEEP
WDTE
Indirect Function Flag (IFF)
STOP
MAP1
MAP0
P4.2
P4.3
P3.3
P3.2
P3.1
P3.0
P2.3
P2.2
P2.1
P2.0
Flag
Write only, access using the instructions: MOV L, #n, SETB @L, CLR @L
The individual set/clear of ports is available only if the package type supports corresponding parallel port.
Address (DPL)
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Enter stop mode. Not set until all pins of P0 and P1 are high.
Enter sleep mode. Released by WDT reset.
Enable flag of WDT. If this flag is cleared, WDT stops running and holds the state.
This flag can be modified if and only if MAP1 bit is set and MAP0 bit is cleared.
This flag is also set by H/W when user sets SLEEP flag or writes IAPCON SFR.
Reset Watch Dog Timer. Set by S/W. Cleared by H/W after WDT is reset.
Address map extension bit 1 for SFR/IFF.
Address map extension bit 0 for SFR/IFF. Do not set this flag for the future compatibility.
Individual bit set/clear for P4
Individual bit set/clear for P4
Individual bit set/clear for P3
Individual bit set/clear for P3
Individual bit set/clear for P3
Individual bit set/clear for P3
Individual bit set/clear for P2
Individual bit set/clear for P2
Individual bit set/clear for P2
Individual bit set/clear for P2
Description
ATOM1.0 Family
Preliminary
Reset Value
0
0
1
0
0
0
1
1
1
1
1
1
1
1
1
1
[12]