gc41c501g1-so24i CORERIVER Semiconductor, gc41c501g1-so24i Datasheet - Page 28

• Manufacturer Part Number: gc41c501g1-so24i
• Description: 4-bit Microcontrollers With Reduced 8051 Architecture
• Manufacturer: CORERIVER Semiconductor

6.12. In Application Programming (IAP)
In Application Programming
IAP Related SFR
User S/W can read or modify specific regions of
FLASH with IAP function during operation.
The EEP0/1 regions may be used as program
memory or data memory.
CPU is halt during IAP and continues execution
after IAP from the next instruction which set
IAPCON.
It takes 6 system clocks to read a byte with IAP.
It takes about 2 ms to write(erase) a byte with IAP.
When user attempts to write IAPCON, WDTE bit in
IFF[13] is also set.
If IAP operation is erase or write, WDT is reset
before the programming is started.
DPH / DPL : Least significant 6-bit address for IAP.
GDH / GDL : 8-bit data buffer for read or write by
IAP.
IAPCON : IAP control SFR. Automatically cleared to
zero after IAP is done.
IAPCON (09h) : IAP Control Register
IAP Enable Condition
RGS[1:0] : Select IAP region
OPS[1:0] : Select IAP function
RGS1
OPS1
R/W(0)
0
0
1
1
0
0
1
1
RGS1
IAP can not erase or write INFO region.
IAPCON can be written if and only if
When IAP is blocked by above condition, "MOV IAPCON, A"
instruction is like "NOP" instruction.
•
•
•
RGS0
OPS0
MAP0 bit in IFF[10] is cleared,
MAP1 bit in IFF[11] is set,
and corresponding bit in CFGWD[2:1] is set.
0
1
0
1
0
1
0
1
R/W(0)
RGS0
ATOM1.0 Family
EEP0 (0x1C0 ~ 0x1FF)
EEP1 (0x3C0 ~ 0x3FF)
INFO (0x0 ~ 0x7)
IAP Function
No operation
R/W(0)
IAP Region
Byte Erase
Byte Write
OPS1
Byte Read
Reserved
Preliminary
R/W(0)
OPS0
[28]