gc41c501g1-so24i CORERIVER Semiconductor, gc41c501g1-so24i Datasheet - Page 56

• Manufacturer Part Number: gc41c501g1-so24i
• Description: 4-bit Microcontrollers With Reduced 8051 Architecture
• Manufacturer: CORERIVER Semiconductor

P2
IAPCON
GDL
GDH
Appendix B :
RGS[1:0] : Select IAP region.
OPS[1:0] : Select IAP function.
R/W(1)
R/W(0)
R/W(0)
R/W(0)
GDL.3
GDH.3
RGS1
(08h) : Port 2 Output Register
P2.3
(0Ah) : The Low Nibble of General Purpose Data Register
(0Bh) : The High Nibble of General Purpose Data Register
(09h) : IAP Control Register
[0,0] : EEP0 (0x1C0 ~ 0x1FF)
[0,1] : EEP1 (0x3C0 ~ 0x3FF)
[1,0] : INFO (0x0 ~ 0x7)
[1,1] : Reserved
[0,0] : N0 operation
[0,1] : Byte read
[1,0] : Byte erase
[1,1] : Byte write
R/W(1)
R/W(0)
R/W(0)
R/W(0)
GDH.2
GDL.2
RGS0
P2.2
SFR Description [08h ~ 0Dh]
R/W(1)
R/W(0)
R/W(0)
R/W(0)
GDH.1
GDL.1
OPS1
P2.1
R/W(1)
R/W(0)
R/W(0)
R/W(0)
GDH.0
GDL.0
OPS0
P2.0
P3
CKCFG
XT/RG
DIV[2:0] : System clock divider selection.
R/W(1)
R/W(0)
XT/RG
(0Ch) : Port 3 Output Register
P3.3
(0Dh) : The Clock Configuration Register
: System clock source selection.
[0,0,0] : F
[0.0,1] : F
[0.1,0] : F
[0.1,1] : F
[1,0,0] : F
[1.0,1] : F
[1.1,0] : F
[1.1,1] : -
0 : Internal Ring oscillator is selected as system clock.
1 : External clock oscillator is selected as system clock.
External clock oscillator is disabled.
Internal Ring oscillator is disabled.
Do not set this bit for 8-pin devices.
R/W(1)
R/W(0)
DIV2
P3.2
(2/3)
OSC
OSC
OSC
OSC
OSC
OSC
OSC
/2
/4
/8
/16
/32
/64
ATOM1.0 Family
R/W(1)
R/W(0)
DIV1
P3.1
Preliminary
R/W(1)
R/W(0)
DIV0
P3.0
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