gc41c501g1-so24i CORERIVER Semiconductor, gc41c501g1-so24i Datasheet - Page 19

• Manufacturer Part Number: gc41c501g1-so24i
• Description: 4-bit Microcontrollers With Reduced 8051 Architecture
• Manufacturer: CORERIVER Semiconductor

6.6. Clock Configuration
Two System Clock Sources : Internal Ring OSC. or External Resonator/Crystal
Default System Clock is Ring OSC.
When user changes the clock source (XT/RG bit), internal reset is generated.
Internal reset does not affect CKCFG.
The configuration SFR (CKCFG) is initialized by power-on reset.
User may change clock frequency during operation by changing divide option.
CKCFG (0Dh) : The clock configuration register.
Internal Clock
External Clock
XT/RG : System clock source selection.
DIV[2:0] : System clock divider selection.
R/W(0)
XT/RG
0 = Internal Ring oscillator is selected as system clock.
1 = External clock is selected as system clock.
External clock osc. is disabled.
Internal Ring oscillator is disabled.
Do not set this bit for 8-pin devices.
R/W(0)
DIV2
XT/RG
0
1
F
OSC
DIV2
R/W(0)
DIV1
Divider
DIV1
R/W(0)
DIV0
DIV0
F
SYS
System Clock
DIV2
0
0
0
0
1
1
1
1
ATOM1.0 Family
DIV1
0
0
1
1
0
0
1
1
Preliminary
DIV0
0
1
0
1
0
1
0
1
F
F
F
F
F
F
OSC
OSC
OSC
F
F
OSC
OSC
OSC
SYS
OSC
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