ST10F271E STMICROELECTRONICS [STMicroelectronics], ST10F271E Datasheet - Page 152

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ST10F271E

Manufacturer Part Number
ST10F271E
Description
16-bit MCU with 128 Kbyte Flash memory and 8/12 Kbyte RAM
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet
Electrical characteristics
24.8.10
Note:
152/180
Figure 46. ST10F271 PLL jitter
PLL lock / unlock
During normal operation, if the PLL gets unlocked for any reason, an interrupt request to the
CPU is generated, and the reference clock (oscillator) is automatically disconnected from
the PLL input: in this way, the PLL goes into free-running mode, providing the system with a
backup clock signal (free running frequency F
crystal failure occurrence without risking to go in an undefined configuration: the system is
provided with a clock allowing the execution of the PLL unlock interrupt routine in a safe
mode.
The path between reference clock and PLL input can be restored only by a hardware reset,
or by a bidirectional software or watchdog reset event that forces the RSTIN pin low.
The external RC circuit on RSTIN pin shall be properly sized in order to extend the duration
of the low pulse to grant the PLL gets locked before the level at RSTIN pin is recognized
high: bidirectional reset internally drives RSTIN pin low for just 1024 TCL (definitively not
sufficient to get the PLL locked starting from free-running mode).
T
±5
±4
±3
±2
±1
JIT
0
0
200
16MHz
400
24MHz
N (CPU clock periods)
600
32MHz
free
40MHz
). This feature allows to recover from a
800
1000
ST10F271B/ST10F271E
1200
64MHz
1400

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