ST10F271E STMICROELECTRONICS [STMicroelectronics], ST10F271E Datasheet - Page 60

• Manufacturer Part Number: ST10F271E
• Description: 16-bit MCU with 128 Kbyte Flash memory and 8/12 Kbyte RAM
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

General purpose timer unit
11
11.1
60/180
General purpose timer unit
The GPT unit is a flexible multifunctional timer/counter structure which is used for time
related tasks such as event timing and counting, pulse width and duty cycle measurements,
pulse generation, or pulse multiplication. The GPT unit contains five 16-bit timers organized
into two separate modules GPT1 and GPT2. Each timer in each module may operate
independently in several different modes, or may be concatenated with another timer of the
same module.
GPT1
Each of the three timers T2, T3, T4 of the GPT1 module can be configured individually for
one of four basic modes of operation: timer, gated timer, counter mode and incremental
interface mode.
In timer mode, the input clock for a timer is derived from the CPU clock, divided by a
programmable prescaler.
In counter mode, the timer is clocked in reference to external events.
Pulse width or duty cycle measurement is supported in gated timer mode where the
operation of a timer is controlled by the ‘gate’ level on an external input pin. For these
purposes, each timer has one associated port pin (TxIN) which serves as gate or clock
input.
Table 34
scaler option at 40MHz and 64MHz CPU clock respectively.
In Incremental Interface Mode, the GPT1 timers (T2, T3, T4) can be directly connected to
the incremental position sensor signals A and B by their respective inputs TxIN and TxEUD.
Direction and count signals are internally derived from these two input signals so that the
contents of the respective timer Tx corresponds to the sensor position. The third position
sensor signal TOP0 can be connected to an interrupt input.
Timer T3 has output toggle latches (TxOTL) which changes state on each timer over flow /
underflow. The state of this latch may be output on port pins (TxOUT) for time out monitoring
of external hardware components, or may be used internally to clock timers T2 and T4 for
high resolution of long duration measurements.
In addition to their basic operating modes, timers T2 and T4 may be configured as reload or
capture registers for timer T3.
Table 34.
Pre-scaler
factor
Input frequency
f
CPU
= 40 MHz
and
GPT1 timer input frequencies, resolutions and periods at 40 MHz
Table 35
5MHz
000b
8
list the timer input frequencies, resolution and periods for each pre-
2.5MHz
001b
16
010b
MHz
1.25
Timer Input Selection T2I / T3I / T4I
32
625 kHz
011b
64
312.5
100b
kHz
128
156.25
101b
256
kHz
ST10F271B/ST10F271E
78.125
110b
512
kHz
39.1 kHz
111b
1024