ST72F63 STMICROELECTRONICS [STMicroelectronics], ST72F63 Datasheet - Page 101

• Manufacturer Part Number: ST72F63
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

13.5 CLOCK AND TIMING CHARACTERISTICS
Subject to general operating conditions for V
13.5.1 General Timings
1. Data based on typical application software.
2. Time measured between interrupt event and interrupt vector fetch. t
the current instruction execution.
13.5.2 CONTROL TIMING CHARACTERISTICS
Note 1: The minimum period t
CONTROL TIMINGS
Symbol
Symbol
T
t
t
t
OXOV
c(INST)
t
f
f
t
PORL
DOGL
t
OSC
DOG
DDR
CPU
t
v(IT)
RL
interrupt service routine plus 21 cycles.
Oscillator Frequency
Operating Frequency
External RESET
Input pulse Width
Internal Power Reset Duration
Watchdog or Low Voltage Reset
Output Pulse Width
Watchdog Time-out
Crystal Oscillator
Start-up Time
Power up rise time
Instruction cycle time
Interrupt reaction time
t
v(IT)
= t
c(INST)
Parameter
Parameter
+ 10 t
ILIL
CPU
2)
should not be less than the number of cycle times it takes to execute the
f
from V
cpu
f
f
DD
CPU
CPU
= 8MHz
, f
=8MHz
=8MHz
Conditions
CPU
DD
Conditions
= 0 to 4V
, and T
A
.
c(INST)
is the number of t
49152
6.144
Min
514
200
1.5
20
1.25
Min
250
10
2
Value
Typ.
Typ
30
375
3
CPU
1)
cycles needed to finish
3145728
393.216
Max
1500
100
Max
2.75
24
40
8
12
22
ST7263B
101/132
MHz
MHz
Unit
t
t
t
Unit
t
t
ms
ms
ms
CPU
CPU
CPU
ns
CPU
CPU
ns
s