ST72F63 STMICROELECTRONICS [STMicroelectronics], ST72F63 Datasheet - Page 106

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ST72F63

Manufacturer Part Number
ST72F63
Description
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet

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ST7263B
EMC CHARACTERISTICS (Cont’d)
13.7.2.2 Static and Dynamic Latch-Up
Electrical Sensitivities
Figure 55. Simplified Diagram of the ESD Generator for DLU
Notes:
1. Class description: A Class is an STMicroelectronics internal specification. All its limits are higher than the JEDEC spec-
ifications, that means when a device belongs to Class A it exceeds the JEDEC standard. B Class strictly covers all the
JEDEC criteria (international standard).
2. Schaffner NSG435 with a pointed test finger.
106/132
LU: 3 complementary static tests are required
on 10 parts to assess the latch-up performance.
A supply overvoltage (applied to each power
supply pin), a current injection (applied to each
input, output and configurable I/O pin) and a
power supply switch sequence are performed
on each sample. This test conforms to the EIA/
JESD 78 IC latch-up standard. For more details,
refer to the AN1181 ST7 application note.
Symbol
DLU
LU
ESD
GENERATOR
Static latch-up class
Dynamic latch-up class
R
2)
CH
Parameter
C
=50M
S
150pF
R
D
=330
HV RELAY
DISCHARGE
RETURN CONNECTION
T
T
V
A
A
DD
+25°C
+85°C
5.5V, f
DISCHARGE TIP
DLU: Electro-Static Discharges (one positive
then one negative test) are applied to each pin
of 3 samples when the micro is running to
assess the latch-up performance in dynamic
mode. Power supplies are set to the typical
values, the oscillator is connected as near as
possible to the pins of the micro and the
component is put in reset mode. This test
conforms to the IEC1000-4-2 and SAEJ1752/3
standards and is described in
more details, refer to the AN1181 ST7
application note.
Conditions
OSC
4MHz, T
A
ST7
+25°C
V
V
DD
SS
Class
Figure
A
A
A
1)
55. For

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