ch7006c Chrontel, ch7006c Datasheet - Page 38

• Manufacturer Part Number: ch7006c
• Description: Ch7006 Digital Pc To Tv Encoder
• Manufacturer: Chrontel

CHRONTEL
ACIV
CIVH[1:0]
CIV[25:24]
Calculated Increment Value Register
The CIV registers 22H through 24H contain a 26-bit value, which is the calculated increment value that should be
used as the upper 26 bits of FSCI. This value is determined by a comparison of the pixel clock and the 14MHz
clock. The bit locations and calculation of CIV are specified as the following:
Register
21H
22H
23H
24H
Version ID Register
This read-only register contains a 8-bit value indicating the identification number assigned to this version of the
CH7006. The default value shown is pre-programmed into this chip and is useful for checking for the correct
version of this chip, before proceeding with its programming.
Address Register
The Address Register points to the register currently being accessed.
38
Bit:
Symbol:
Type:
Default:
Bit:
Symbol:
Type:
Default:
Bit:
Symbol:
Type:
Default:
7
R
0
7
R
0
7
CIV#
VID7
When the automatic calculated increment value is 1, the number calculated and present at the CIV
registers will automatically be used as the increment value for subcarrier generation, removing the
1, the subcarrier generation must be forced to free-run mode.
These bits control the hysteresis circuit which is used to calculate the CIV value.
See descriptions in the next section.
Contents
CIV[25:24]
CIV[23:16]
CIV[15:8]
CIV[7:0]
need for the user to read the CIV value and write in a new FSCI value. Whenever this bit is set to
6
CIV#
R
0
6
VID6
R
0
6
5
CIV#
R
0
5
VID5
R
1
5
AR5
R/W
X
4
CIV#
R
0
4
VID4
R
0
4
AR4
R/W
X
3
CIV#
R
0
3
VID3
R
1
3
R/W
X
AR3
2
VID2
R
0
2
AR2
R/W
X
2
CIV#
R
0
201-0000-026 Rev. 2.8, 6/24/2004
Symbol: CIV
Address: 22H - 24H
Bits: 8
Symbol: VID
Address: 25H
Bits: 8
Address: 3FH
Bits: 6
Symbol: AR
1
VID1
R
1
1
AR1
R/W
X
1
CIV#
R
0
CH7006C
0
VID0
R
0
0
AR0
R/W
X
0
CIV#
R
0