DS705 XILINX [Xilinx, Inc], DS705 Datasheet - Page 33

• Manufacturer Part Number: DS705
• Description: XA Spartan-3A DSP Automotive FPGA Family Data Sheet
• Manufacturer: XILINX [Xilinx, Inc]

Table 31: CLB Distributed RAM Switching Characteristics
Table 32: CLB Shift Register Switching Characteristics
DS705 (v1.1) January 20, 2009
Product Specification
Clock-to-Output Times
Setup Times
Hold Times
Clock Pulse Width
Clock-to-Output Times
Setup Times
Hold Times
Clock Pulse Width
T
T
WPH
WPH
T
Symbol
Symbol
T
T
T
AH,
T
SHCKO
SRLDH
SRLDS
T
T
T
T
REG
WS
DS
AS
DH
, T
, T
T
WH
WPL
WPL
R
Time from the active edge at the CLK input to data appearing on the distributed RAM
output
Setup time of data at the BX or BY input before the active transition at the CLK input
of the distributed RAM
Setup time of the F/G address inputs before the active transition at the CLK input of
the distributed RAM
Setup time of the write enable input before the active transition at the CLK input of the
distributed RAM
Hold time of the BX and BY data inputs after the active transition at the CLK input of
the distributed RAM
Hold time of the F/G address inputs or the write enable input after the active transition
at the CLK input of the distributed RAM
Minimum High or Low pulse width at CLK input
Time from the active edge at the CLK input to data appearing on the shift register
output
Setup time of data at the BX or BY input before the active transition at the CLK input
of the shift register
Hold time of the BX or BY data input after the active transition at the CLK input of the
shift register
Minimum High or Low pulse width at CLK input
Description
Description
www.xilinx.com
XA Spartan-3A DSP Automotive FPGA Family Data Sheet
-0.02
Speed Grade
0.36
0.59
0.13
0.01
1.01
Speed Grade
0.18
0.16
1.01
Min
Min
-
-
-4
-4
Max
1.72
Max
4.82
-
-
-
-
-
-
-
-
-
Units
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
33