DS705 XILINX [Xilinx, Inc], DS705 Datasheet - Page 36

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DS705

Manufacturer Part Number
DS705
Description
XA Spartan-3A DSP Automotive FPGA Family Data Sheet
Manufacturer
XILINX [Xilinx, Inc]
Datasheet
DSP48A Timing
To reference the DSP48A block diagram, see the XtremeDSP DSP48A for Spartan-3A DSP FPGAs User Guide (UG431).
Table 35: Setup Times for the DSP48A
DS705 (v1.1) January 20, 2009
Product Specification
Notes:
1.
2.
Setup Times of Data/Control Pins to the Input Register Clock
T
T
T
T
T
T
Setup Times of Data Pins to the Pipeline Register Clock
T
T
T
T
Setup Times of Data/Control Pins to the Output Register Clock
T
T
T
T
T
DSPDCK_AA
DSPDCK_DB
DSPDCK_CC
DSPDCK_DD
DSPDCK_OPB
DSPDCK_OPOP
DSPDCK_AM
DSPDCK_BM
DSPDCK_DM
DSPDCK_OPM
DSPDCK_AP
DSPDCK_BP
DSPDCK_DP
DSPDCK_CP
DSPDCK_OPP
Symbol
“Yes” means that the component is in the path. “No” means that the component is being bypassed. “-” means that no path exists, so it is not
applicable.
The numbers in this table are based on the operating conditions set forth in
R
A input to A register CLK
D input to B register CLK
C input to C register CLK
D input to D register CLK
OPMODE input to B register CLK
OPMODE input to OPMODE register CLK
A input to M register CLK
B input to M register CLK
D input to M register CLK
OPMODE to M register CLK
A input to P register CLK
B input to P register CLK
D input to P register CLK
C input to P register CLK
OPMODE input to P register CLK
Description
www.xilinx.com
XA Spartan-3A DSP Automotive FPGA Family Data Sheet
Pre-adder
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
No
No
-
-
-
-
-
-
-
Table
Multiplier
8.
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
-
-
-
-
-
-
-
Post-adder
Yes
Yes
Yes
Yes
Yes
Yes
-
-
-
-
-
-
-
-
-
-
-
Speed Grade
Min
0.04
1.88
0.05
0.04
0.42
0.06
3.79
4.97
3.79
5.06
5.42
5.49
6.74
5.48
6.83
2.18
7.18
-4
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
36

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